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commit 9e67793bccc46cb26c8e9ef68e5e203fd1ebbdef
parent 729bc325792658d84f2655105b08762b35f7300e
Author: Martin Klöckner <mjkloeckner@gmail.com>
Date:   Thu, 16 Apr 2026 18:53:31 -0300

Add `vhdl/dev/button_controlled_led/**`

Diffstat:
A
vhdl/dev/button_controlled_led/Makefile
 | 
24
++++++++++++++++++++++++
A
vhdl/dev/button_controlled_led/button_controlled_led.vhd
 | 
22
++++++++++++++++++++++
A
vhdl/dev/button_controlled_led/button_controlled_led_tb.vhd
 | 
27
+++++++++++++++++++++++++++

3 files changed, 73 insertions(+), 0 deletions(-)
diff --git a/vhdl/dev/button_controlled_led/Makefile b/vhdl/dev/button_controlled_led/Makefile
@@ -0,0 +1,24 @@
+GHDL          = ghdl
+DEV_NAME      = button_controlled_led
+TOP           = $(DEV_NAME)_tb
+TOP_SRC       = $(TOP).vhd
+SRCS          = $(DEV_NAME).vhd
+WAVEFORM_FILE = $(TOP).vcd
+
+all: run
+
+analyze:
+    $(GHDL) -a $(SRCS)
+    $(GHDL) -a $(TOP_SRC)
+
+elaborate: analyze
+    $(GHDL) -e $(TOP)
+
+run: elaborate
+    $(GHDL) -r $(TOP) --vcd=$(WAVEFORM_FILE) --stop-time=1ms
+
+clean:
+    rm -f *.o *.cf $(TOP) $(TOP).vcd
+
+view: all
+    nohup surfer $(WAVEFORM_FILE) >/dev/null 2>&1 &
diff --git a/vhdl/dev/button_controlled_led/button_controlled_led.vhd b/vhdl/dev/button_controlled_led/button_controlled_led.vhd
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+-- expose signals outside of this module
+entity button_controlled_led is
+port(
+    button_a : in  std_logic;
+    led_a    : out std_logic);
+end entity;
+
+architecture button_controlled_led_arq of button_controlled_led is
+begin
+
+    process(button_a) is 
+    begin
+
+        led_a <= button_a;
+
+    end process;
+
+end architecture;
diff --git a/vhdl/dev/button_controlled_led/button_controlled_led_tb.vhd b/vhdl/dev/button_controlled_led/button_controlled_led_tb.vhd
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity button_controlled_led_tb is
+end entity;
+
+architecture button_controlled_led_arq of button_controlled_led_tb is
+
+    signal sig_button : std_logic := '0';
+    signal sig_led    : std_logic;
+
+begin
+
+    DUT : entity work.button_controlled_led(button_controlled_led_arq) port map(
+        button_a => sig_button,
+        led_a    => sig_led);
+
+    process is 
+    begin
+
+        sig_button <= not sig_button after 250 us;
+        wait for 10 us;
+
+    end process;
+
+end architecture;