tdse-tp0_03-hw_sw_test

FIUBA - Electrónica - Taller de Sistemas Embebidos - Trabajo Práctico N°: 0 - Proyecto N°: 03
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h (7902B)
   1 /**
   2  ******************************************************************************
   3  * @file    stm32f1xx_ll_utils.h
   4  * @author  MCD Application Team
   5  * @brief   Header file of UTILS LL module.
   6  ******************************************************************************
   7  * @attention
   8  *
   9  * Copyright (c) 2016 STMicroelectronics.
  10  * All rights reserved.
  11  *
  12  * This software is licensed under terms that can be found in the LICENSE file
  13  * in the root directory of this software component.
  14  * If no LICENSE file comes with this software, it is provided AS-IS.
  15  *
  16  ******************************************************************************
  17  @verbatim
  18  ==============================================================================
  19  ##### How to use this driver #####
  20  ==============================================================================
  21  [..]
  22  The LL UTILS driver contains a set of generic APIs that can be
  23  used by user:
  24  (+) Device electronic signature
  25  (+) Timing functions
  26  (+) PLL configuration functions
  27 
  28  @endverbatim
  29  ******************************************************************************
  30  */
  31 
  32 /* Define to prevent recursive inclusion -------------------------------------*/
  33 #ifndef __STM32F1xx_LL_UTILS_H
  34 #define __STM32F1xx_LL_UTILS_H
  35 
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39 
  40 /* Includes ------------------------------------------------------------------*/
  41 #include "stm32f1xx.h"
  42 
  43 /** @addtogroup STM32F1xx_LL_Driver
  44  * @{
  45  */
  46 
  47 /** @defgroup UTILS_LL UTILS
  48  * @{
  49  */
  50 
  51 /* Private types -------------------------------------------------------------*/
  52 /* Private variables ---------------------------------------------------------*/
  53 
  54 /* Private constants ---------------------------------------------------------*/
  55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
  56  * @{
  57  */
  58 
  59 /* Max delay can be used in LL_mDelay */
  60 #define LL_MAX_DELAY                  0xFFFFFFFFU
  61 
  62 /**
  63  * @brief Unique device ID register base address
  64  */
  65 #define UID_BASE_ADDRESS              UID_BASE
  66 
  67 /**
  68  * @brief Flash size data register base address
  69  */
  70 #define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
  71 
  72 /**
  73  * @}
  74  */
  75 
  76 /* Private macros ------------------------------------------------------------*/
  77 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
  78  * @{
  79  */
  80 /**
  81  * @}
  82  */
  83 /* Exported types ------------------------------------------------------------*/
  84 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
  85  * @{
  86  */
  87 /**
  88  * @brief  UTILS PLL structure definition
  89  */
  90 typedef struct {
  91     uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
  92      This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
  93 
  94      This feature can be modified afterwards using unitary function
  95      @ref LL_RCC_PLL_ConfigDomain_SYS(). */
  96 
  97     uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
  98      This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
  99 
 100      This feature can be modified afterwards using unitary function
 101      @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 102 } LL_UTILS_PLLInitTypeDef;
 103 
 104 /**
 105  * @brief  UTILS System, AHB and APB buses clock configuration structure definition
 106  */
 107 typedef struct {
 108     uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
 109      This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
 110 
 111      This feature can be modified afterwards using unitary function
 112      @ref LL_RCC_SetAHBPrescaler(). */
 113 
 114     uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
 115      This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
 116 
 117      This feature can be modified afterwards using unitary function
 118      @ref LL_RCC_SetAPB1Prescaler(). */
 119 
 120     uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
 121      This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
 122 
 123      This feature can be modified afterwards using unitary function
 124      @ref LL_RCC_SetAPB2Prescaler(). */
 125 
 126 } LL_UTILS_ClkInitTypeDef;
 127 
 128 /**
 129  * @}
 130  */
 131 
 132 /* Exported constants --------------------------------------------------------*/
 133 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
 134  * @{
 135  */
 136 
 137 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
 138  * @{
 139  */
 140 #define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
 141 #define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
 142 /**
 143  * @}
 144  */
 145 
 146 /**
 147  * @}
 148  */
 149 
 150 /* Exported macro ------------------------------------------------------------*/
 151 
 152 /* Exported functions --------------------------------------------------------*/
 153 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
 154  * @{
 155  */
 156 
 157 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
 158  * @{
 159  */
 160 
 161 /**
 162  * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
 163  * @retval UID[31:0]
 164  */
 165 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
 166 {
 167     return (uint32_t) (READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
 168 }
 169 
 170 /**
 171  * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
 172  * @retval UID[63:32]
 173  */
 174 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
 175 {
 176     return (uint32_t) (READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
 177 }
 178 
 179 /**
 180  * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
 181  * @retval UID[95:64]
 182  */
 183 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
 184 {
 185     return (uint32_t) (READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
 186 }
 187 
 188 /**
 189  * @brief  Get Flash memory size
 190  * @note   This bitfield indicates the size of the device Flash memory expressed in
 191  *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
 192  * @retval FLASH_SIZE[15:0]: Flash memory size
 193  */
 194 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
 195 {
 196     return (uint16_t) (READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
 197 }
 198 
 199 /**
 200  * @}
 201  */
 202 
 203 /** @defgroup UTILS_LL_EF_DELAY DELAY
 204  * @{
 205  */
 206 
 207 /**
 208  * @brief  This function configures the Cortex-M SysTick source of the time base.
 209  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
 210  * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
 211  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
 212  * @param  Ticks Frequency of Ticks (Hz)
 213  * @retval None
 214  */
 215 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 216 {
 217     /* Configure the SysTick to have interrupt in 1ms time base */
 218     SysTick->LOAD = (uint32_t) ((HCLKFrequency / Ticks) - 1UL); /* set reload register */
 219     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
 220     SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
 221     SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
 222 }
 223 
 224 void LL_Init1msTick(uint32_t HCLKFrequency);
 225 void LL_mDelay(uint32_t Delay);
 226 
 227 /**
 228  * @}
 229  */
 230 
 231 /** @defgroup UTILS_EF_SYSTEM SYSTEM
 232  * @{
 233  */
 234 
 235 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
 236 #if defined(FLASH_ACR_LATENCY)
 237 ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
 238 #endif /* FLASH_ACR_LATENCY */
 239 ErrorStatus LL_PLL_ConfigSystemClock_HSI(
 240         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 241         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 242 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency,
 243         uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 244         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 245 #if defined(RCC_PLL2_SUPPORT)
 246 ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 247                                           LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 248 #endif /* RCC_PLL2_SUPPORT */
 249 /**
 250  * @}
 251  */
 252 
 253 /**
 254  * @}
 255  */
 256 
 257 /**
 258  * @}
 259  */
 260 
 261 /**
 262  * @}
 263  */
 264 
 265 #ifdef __cplusplus
 266 }
 267 #endif
 268 
 269 #endif /* __STM32F1xx_LL_UTILS_H */