Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h (13716B)
1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_ll_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR LL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F1xx_LL_PWR_H 21 #define __STM32F1xx_LL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f1xx.h" 29 30 /** @addtogroup STM32F1xx_LL_Driver 31 * @{ 32 */ 33 34 #if defined(PWR) 35 36 /** @defgroup PWR_LL PWR 37 * @{ 38 */ 39 40 /* Private types -------------------------------------------------------------*/ 41 /* Private variables ---------------------------------------------------------*/ 42 /* Private constants ---------------------------------------------------------*/ 43 /* Private macros ------------------------------------------------------------*/ 44 /* Exported types ------------------------------------------------------------*/ 45 /* Exported constants --------------------------------------------------------*/ 46 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants 47 * @{ 48 */ 49 50 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines 51 * @brief Flags defines which can be used with LL_PWR_WriteReg function 52 * @{ 53 */ 54 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ 55 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ 56 /** 57 * @} 58 */ 59 60 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines 61 * @brief Flags defines which can be used with LL_PWR_ReadReg function 62 * @{ 63 */ 64 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ 65 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ 66 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ 67 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */ 68 /** 69 * @} 70 */ 71 72 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power 73 * @{ 74 */ 75 #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ 76 #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */ 77 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode 83 * @{ 84 */ 85 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */ 86 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */ 87 /** 88 * @} 89 */ 90 91 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level 92 * @{ 93 */ 94 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */ 95 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */ 96 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */ 97 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ 98 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */ 99 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */ 100 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */ 101 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */ 102 /** 103 * @} 104 */ 105 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins 106 * @{ 107 */ 108 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */ 109 /** 110 * @} 111 */ 112 113 /** 114 * @} 115 */ 116 117 /* Exported macro ------------------------------------------------------------*/ 118 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros 119 * @{ 120 */ 121 122 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros 123 * @{ 124 */ 125 126 /** 127 * @brief Write a value in PWR register 128 * @param __REG__ Register to be written 129 * @param __VALUE__ Value to be written in the register 130 * @retval None 131 */ 132 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) 133 134 /** 135 * @brief Read a value in PWR register 136 * @param __REG__ Register to be read 137 * @retval Register value 138 */ 139 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) 140 /** 141 * @} 142 */ 143 144 /** 145 * @} 146 */ 147 148 /* Exported functions --------------------------------------------------------*/ 149 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions 150 * @{ 151 */ 152 153 /** @defgroup PWR_LL_EF_Configuration Configuration 154 * @{ 155 */ 156 157 /** 158 * @brief Enable access to the backup domain 159 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess 160 * @retval None 161 */ 162 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) 163 { 164 SET_BIT(PWR->CR, PWR_CR_DBP); 165 } 166 167 /** 168 * @brief Disable access to the backup domain 169 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess 170 * @retval None 171 */ 172 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) 173 { 174 CLEAR_BIT(PWR->CR, PWR_CR_DBP); 175 } 176 177 /** 178 * @brief Check if the backup domain is enabled 179 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess 180 * @retval State of bit (1 or 0). 181 */ 182 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) 183 { 184 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); 185 } 186 187 /** 188 * @brief Set voltage Regulator mode during deep sleep mode 189 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS 190 * @param RegulMode This parameter can be one of the following values: 191 * @arg @ref LL_PWR_REGU_DSMODE_MAIN 192 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER 193 * @retval None 194 */ 195 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) 196 { 197 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); 198 } 199 200 /** 201 * @brief Get voltage Regulator mode during deep sleep mode 202 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS 203 * @retval Returned value can be one of the following values: 204 * @arg @ref LL_PWR_REGU_DSMODE_MAIN 205 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER 206 */ 207 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) 208 { 209 return (uint32_t) (READ_BIT(PWR->CR, PWR_CR_LPDS)); 210 } 211 212 /** 213 * @brief Set Power Down mode when CPU enters deepsleep 214 * @rmtoll CR PDDS LL_PWR_SetPowerMode\n 215 * @rmtoll CR LPDS LL_PWR_SetPowerMode 216 * @param PDMode This parameter can be one of the following values: 217 * @arg @ref LL_PWR_MODE_STOP_MAINREGU 218 * @arg @ref LL_PWR_MODE_STOP_LPREGU 219 * @arg @ref LL_PWR_MODE_STANDBY 220 * @retval None 221 */ 222 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) 223 { 224 MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode); 225 } 226 227 /** 228 * @brief Get Power Down mode when CPU enters deepsleep 229 * @rmtoll CR PDDS LL_PWR_GetPowerMode\n 230 * @rmtoll CR LPDS LL_PWR_GetPowerMode 231 * @retval Returned value can be one of the following values: 232 * @arg @ref LL_PWR_MODE_STOP_MAINREGU 233 * @arg @ref LL_PWR_MODE_STOP_LPREGU 234 * @arg @ref LL_PWR_MODE_STANDBY 235 */ 236 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) 237 { 238 return (uint32_t) (READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS))); 239 } 240 241 /** 242 * @brief Configure the voltage threshold detected by the Power Voltage Detector 243 * @rmtoll CR PLS LL_PWR_SetPVDLevel 244 * @param PVDLevel This parameter can be one of the following values: 245 * @arg @ref LL_PWR_PVDLEVEL_0 246 * @arg @ref LL_PWR_PVDLEVEL_1 247 * @arg @ref LL_PWR_PVDLEVEL_2 248 * @arg @ref LL_PWR_PVDLEVEL_3 249 * @arg @ref LL_PWR_PVDLEVEL_4 250 * @arg @ref LL_PWR_PVDLEVEL_5 251 * @arg @ref LL_PWR_PVDLEVEL_6 252 * @arg @ref LL_PWR_PVDLEVEL_7 253 * @retval None 254 */ 255 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) 256 { 257 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); 258 } 259 260 /** 261 * @brief Get the voltage threshold detection 262 * @rmtoll CR PLS LL_PWR_GetPVDLevel 263 * @retval Returned value can be one of the following values: 264 * @arg @ref LL_PWR_PVDLEVEL_0 265 * @arg @ref LL_PWR_PVDLEVEL_1 266 * @arg @ref LL_PWR_PVDLEVEL_2 267 * @arg @ref LL_PWR_PVDLEVEL_3 268 * @arg @ref LL_PWR_PVDLEVEL_4 269 * @arg @ref LL_PWR_PVDLEVEL_5 270 * @arg @ref LL_PWR_PVDLEVEL_6 271 * @arg @ref LL_PWR_PVDLEVEL_7 272 */ 273 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) 274 { 275 return (uint32_t) (READ_BIT(PWR->CR, PWR_CR_PLS)); 276 } 277 278 /** 279 * @brief Enable Power Voltage Detector 280 * @rmtoll CR PVDE LL_PWR_EnablePVD 281 * @retval None 282 */ 283 __STATIC_INLINE void LL_PWR_EnablePVD(void) 284 { 285 SET_BIT(PWR->CR, PWR_CR_PVDE); 286 } 287 288 /** 289 * @brief Disable Power Voltage Detector 290 * @rmtoll CR PVDE LL_PWR_DisablePVD 291 * @retval None 292 */ 293 __STATIC_INLINE void LL_PWR_DisablePVD(void) 294 { 295 CLEAR_BIT(PWR->CR, PWR_CR_PVDE); 296 } 297 298 /** 299 * @brief Check if Power Voltage Detector is enabled 300 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD 301 * @retval State of bit (1 or 0). 302 */ 303 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) 304 { 305 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); 306 } 307 308 /** 309 * @brief Enable the WakeUp PINx functionality 310 * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin 311 * @param WakeUpPin This parameter can be one of the following values: 312 * @arg @ref LL_PWR_WAKEUP_PIN1 313 * @retval None 314 */ 315 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) 316 { 317 SET_BIT(PWR->CSR, WakeUpPin); 318 } 319 320 /** 321 * @brief Disable the WakeUp PINx functionality 322 * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin 323 * @param WakeUpPin This parameter can be one of the following values: 324 * @arg @ref LL_PWR_WAKEUP_PIN1 325 * @retval None 326 */ 327 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) 328 { 329 CLEAR_BIT(PWR->CSR, WakeUpPin); 330 } 331 332 /** 333 * @brief Check if the WakeUp PINx functionality is enabled 334 * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin 335 * @param WakeUpPin This parameter can be one of the following values: 336 * @arg @ref LL_PWR_WAKEUP_PIN1 337 * @retval State of bit (1 or 0). 338 */ 339 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) 340 { 341 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); 342 } 343 344 /** 345 * @} 346 */ 347 348 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management 349 * @{ 350 */ 351 352 /** 353 * @brief Get Wake-up Flag 354 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU 355 * @retval State of bit (1 or 0). 356 */ 357 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) 358 { 359 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); 360 } 361 362 /** 363 * @brief Get Standby Flag 364 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB 365 * @retval State of bit (1 or 0). 366 */ 367 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) 368 { 369 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); 370 } 371 372 /** 373 * @brief Indicate whether VDD voltage is below the selected PVD threshold 374 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO 375 * @retval State of bit (1 or 0). 376 */ 377 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) 378 { 379 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); 380 } 381 382 /** 383 * @brief Clear Standby Flag 384 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB 385 * @retval None 386 */ 387 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) 388 { 389 SET_BIT(PWR->CR, PWR_CR_CSBF); 390 } 391 392 /** 393 * @brief Clear Wake-up Flags 394 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU 395 * @retval None 396 */ 397 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) 398 { 399 SET_BIT(PWR->CR, PWR_CR_CWUF); 400 } 401 402 /** 403 * @} 404 */ 405 406 #if defined(USE_FULL_LL_DRIVER) 407 /** @defgroup PWR_LL_EF_Init De-initialization function 408 * @{ 409 */ 410 ErrorStatus LL_PWR_DeInit(void); 411 /** 412 * @} 413 */ 414 #endif /* USE_FULL_LL_DRIVER */ 415 416 /** 417 * @} 418 */ 419 420 /** 421 * @} 422 */ 423 424 #endif /* defined(PWR) */ 425 426 /** 427 * @} 428 */ 429 430 #ifdef __cplusplus 431 } 432 #endif 433 434 #endif /* __STM32F1xx_LL_PWR_H */