Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h (35279B)
1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_flash_ex.h 4 * @author MCD Application Team 5 * @brief Header file of Flash HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F1xx_HAL_FLASH_EX_H 20 #define __STM32F1xx_HAL_FLASH_EX_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f1xx_hal_def.h" 28 29 /** @addtogroup STM32F1xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup FLASHEx 34 * @{ 35 */ 36 37 /** @addtogroup FLASHEx_Private_Constants 38 * @{ 39 */ 40 41 #define FLASH_SIZE_DATA_REGISTER 0x1FFFF7E0U 42 #define OBR_REG_INDEX 1U 43 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) 44 45 /** 46 * @} 47 */ 48 49 /** @addtogroup FLASHEx_Private_Macros 50 * @{ 51 */ 52 53 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 54 55 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) 56 57 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) 58 59 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) 60 61 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) 62 63 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 64 65 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 66 67 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 68 69 #if defined(FLASH_BANK2_END) 70 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) 71 #endif /* FLASH_BANK2_END */ 72 73 /* Low Density */ 74 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 75 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08007FFFU) : \ 76 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08003FFFU)) 77 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 78 79 /* Medium Density */ 80 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 81 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 82 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU) : \ 83 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFFU) : \ 84 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFFU)))) 85 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 86 87 /* High Density */ 88 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 89 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFFU) : \ 90 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFFU) : \ 91 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU))) 92 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 93 94 /* XL Density */ 95 #if defined(FLASH_BANK2_END) 96 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFFU) : \ 97 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFFU)) 98 #endif /* FLASH_BANK2_END */ 99 100 /* Connectivity Line */ 101 #if (defined(STM32F105xC) || defined(STM32F107xC)) 102 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU) : \ 103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU))) 105 #endif /* STM32F105xC || STM32F107xC */ 106 107 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) 108 109 #if defined(FLASH_BANK2_END) 110 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 111 ((BANK) == FLASH_BANK_2) || \ 112 ((BANK) == FLASH_BANK_BOTH)) 113 #else 114 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) 115 #endif /* FLASH_BANK2_END */ 116 117 /* Low Density */ 118 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 119 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 120 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFFU))) 121 122 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 123 124 /* Medium Density */ 125 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 126 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 127 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \ 128 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 129 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFFU))))) 130 131 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 132 133 /* High Density */ 134 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 135 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? \ 136 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? \ 137 ((ADDRESS) <= 0x0805FFFFU) : ((ADDRESS) <= 0x0803FFFFU)))) 138 139 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 140 141 /* XL Density */ 142 #if defined(FLASH_BANK2_END) 143 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? \ 144 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFFU))) 145 146 #endif /* FLASH_BANK2_END */ 147 148 /* Connectivity Line */ 149 #if (defined(STM32F105xC) || defined(STM32F107xC)) 150 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \ 151 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 152 ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU)))) 153 154 #endif /* STM32F105xC || STM32F107xC */ 155 156 /** 157 * @} 158 */ 159 160 /* Exported types ------------------------------------------------------------*/ 161 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types 162 * @{ 163 */ 164 165 /** 166 * @brief FLASH Erase structure definition 167 */ 168 typedef struct { 169 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. 170 This parameter can be a value of @ref FLASHEx_Type_Erase */ 171 172 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 173 This parameter must be a value of @ref FLASHEx_Banks */ 174 175 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled 176 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END 177 (x = 1 or 2 depending on devices)*/ 178 179 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. 180 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ 181 182 } FLASH_EraseInitTypeDef; 183 184 /** 185 * @brief FLASH Options bytes program structure definition 186 */ 187 typedef struct { 188 uint32_t OptionType; /*!< OptionType: Option byte to be configured. 189 This parameter can be a value of @ref FLASHEx_OB_Type */ 190 191 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. 192 This parameter can be a value of @ref FLASHEx_OB_WRP_State */ 193 194 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected 195 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ 196 197 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. 198 This parameter must be a value of @ref FLASHEx_Banks */ 199 200 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. 201 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ 202 203 #if defined(FLASH_BANK2_END) 204 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 205 IWDG / STOP / STDBY / BOOT1 206 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 207 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ 208 #else 209 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 210 IWDG / STOP / STDBY 211 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 212 @ref FLASHEx_OB_nRST_STDBY */ 213 #endif /* FLASH_BANK2_END */ 214 215 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed 216 This parameter can be a value of @ref FLASHEx_OB_Data_Address */ 217 218 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA 219 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 220 } FLASH_OBProgramInitTypeDef; 221 222 /** 223 * @} 224 */ 225 226 /* Exported constants --------------------------------------------------------*/ 227 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants 228 * @{ 229 */ 230 231 /** @defgroup FLASHEx_Constants FLASH Constants 232 * @{ 233 */ 234 235 /** @defgroup FLASHEx_Page_Size Page Size 236 * @{ 237 */ 238 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 239 #define FLASH_PAGE_SIZE 0x400U 240 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 241 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 242 243 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) 244 #define FLASH_PAGE_SIZE 0x800U 245 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 246 /* STM32F101xG || STM32F103xG */ 247 /* STM32F105xC || STM32F107xC */ 248 249 /** 250 * @} 251 */ 252 253 /** @defgroup FLASHEx_Type_Erase Type Erase 254 * @{ 255 */ 256 #define FLASH_TYPEERASE_PAGES 0x00U /*!<Pages erase only*/ 257 #define FLASH_TYPEERASE_MASSERASE 0x02U /*!<Flash mass erase activation*/ 258 259 /** 260 * @} 261 */ 262 263 /** @defgroup FLASHEx_Banks Banks 264 * @{ 265 */ 266 #if defined(FLASH_BANK2_END) 267 #define FLASH_BANK_1 1U /*!< Bank 1 */ 268 #define FLASH_BANK_2 2U /*!< Bank 2 */ 269 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ 270 271 #else 272 #define FLASH_BANK_1 1U /*!< Bank 1 */ 273 #endif 274 /** 275 * @} 276 */ 277 278 /** 279 * @} 280 */ 281 282 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants 283 * @{ 284 */ 285 286 /** @defgroup FLASHEx_OB_Type Option Bytes Type 287 * @{ 288 */ 289 #define OPTIONBYTE_WRP 0x01U /*!<WRP option byte configuration*/ 290 #define OPTIONBYTE_RDP 0x02U /*!<RDP option byte configuration*/ 291 #define OPTIONBYTE_USER 0x04U /*!<USER option byte configuration*/ 292 #define OPTIONBYTE_DATA 0x08U /*!<DATA option byte configuration*/ 293 294 /** 295 * @} 296 */ 297 298 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State 299 * @{ 300 */ 301 #define OB_WRPSTATE_DISABLE 0x00U /*!<Disable the write protection of the desired pages*/ 302 #define OB_WRPSTATE_ENABLE 0x01U /*!<Enable the write protection of the desired pagess*/ 303 304 /** 305 * @} 306 */ 307 308 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection 309 * @{ 310 */ 311 /* STM32 Low and Medium density devices */ 312 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ 313 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ 314 || defined(STM32F103xB) 315 #define OB_WRP_PAGES0TO3 0x00000001U /*!< Write protection of page 0 to 3 */ 316 #define OB_WRP_PAGES4TO7 0x00000002U /*!< Write protection of page 4 to 7 */ 317 #define OB_WRP_PAGES8TO11 0x00000004U /*!< Write protection of page 8 to 11 */ 318 #define OB_WRP_PAGES12TO15 0x00000008U /*!< Write protection of page 12 to 15 */ 319 #define OB_WRP_PAGES16TO19 0x00000010U /*!< Write protection of page 16 to 19 */ 320 #define OB_WRP_PAGES20TO23 0x00000020U /*!< Write protection of page 20 to 23 */ 321 #define OB_WRP_PAGES24TO27 0x00000040U /*!< Write protection of page 24 to 27 */ 322 #define OB_WRP_PAGES28TO31 0x00000080U /*!< Write protection of page 28 to 31 */ 323 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 324 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 325 326 /* STM32 Medium-density devices */ 327 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 328 #define OB_WRP_PAGES32TO35 0x00000100U /*!< Write protection of page 32 to 35 */ 329 #define OB_WRP_PAGES36TO39 0x00000200U /*!< Write protection of page 36 to 39 */ 330 #define OB_WRP_PAGES40TO43 0x00000400U /*!< Write protection of page 40 to 43 */ 331 #define OB_WRP_PAGES44TO47 0x00000800U /*!< Write protection of page 44 to 47 */ 332 #define OB_WRP_PAGES48TO51 0x00001000U /*!< Write protection of page 48 to 51 */ 333 #define OB_WRP_PAGES52TO55 0x00002000U /*!< Write protection of page 52 to 55 */ 334 #define OB_WRP_PAGES56TO59 0x00004000U /*!< Write protection of page 56 to 59 */ 335 #define OB_WRP_PAGES60TO63 0x00008000U /*!< Write protection of page 60 to 63 */ 336 #define OB_WRP_PAGES64TO67 0x00010000U /*!< Write protection of page 64 to 67 */ 337 #define OB_WRP_PAGES68TO71 0x00020000U /*!< Write protection of page 68 to 71 */ 338 #define OB_WRP_PAGES72TO75 0x00040000U /*!< Write protection of page 72 to 75 */ 339 #define OB_WRP_PAGES76TO79 0x00080000U /*!< Write protection of page 76 to 79 */ 340 #define OB_WRP_PAGES80TO83 0x00100000U /*!< Write protection of page 80 to 83 */ 341 #define OB_WRP_PAGES84TO87 0x00200000U /*!< Write protection of page 84 to 87 */ 342 #define OB_WRP_PAGES88TO91 0x00400000U /*!< Write protection of page 88 to 91 */ 343 #define OB_WRP_PAGES92TO95 0x00800000U /*!< Write protection of page 92 to 95 */ 344 #define OB_WRP_PAGES96TO99 0x01000000U /*!< Write protection of page 96 to 99 */ 345 #define OB_WRP_PAGES100TO103 0x02000000U /*!< Write protection of page 100 to 103 */ 346 #define OB_WRP_PAGES104TO107 0x04000000U /*!< Write protection of page 104 to 107 */ 347 #define OB_WRP_PAGES108TO111 0x08000000U /*!< Write protection of page 108 to 111 */ 348 #define OB_WRP_PAGES112TO115 0x10000000U /*!< Write protection of page 112 to 115 */ 349 #define OB_WRP_PAGES116TO119 0x20000000U /*!< Write protection of page 115 to 119 */ 350 #define OB_WRP_PAGES120TO123 0x40000000U /*!< Write protection of page 120 to 123 */ 351 #define OB_WRP_PAGES124TO127 0x80000000U /*!< Write protection of page 124 to 127 */ 352 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 353 354 /* STM32 High-density, XL-density and Connectivity line devices */ 355 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ 356 || defined(STM32F101xG) || defined(STM32F103xG) \ 357 || defined(STM32F105xC) || defined(STM32F107xC) 358 #define OB_WRP_PAGES0TO1 0x00000001U /*!< Write protection of page 0 TO 1 */ 359 #define OB_WRP_PAGES2TO3 0x00000002U /*!< Write protection of page 2 TO 3 */ 360 #define OB_WRP_PAGES4TO5 0x00000004U /*!< Write protection of page 4 TO 5 */ 361 #define OB_WRP_PAGES6TO7 0x00000008U /*!< Write protection of page 6 TO 7 */ 362 #define OB_WRP_PAGES8TO9 0x00000010U /*!< Write protection of page 8 TO 9 */ 363 #define OB_WRP_PAGES10TO11 0x00000020U /*!< Write protection of page 10 TO 11 */ 364 #define OB_WRP_PAGES12TO13 0x00000040U /*!< Write protection of page 12 TO 13 */ 365 #define OB_WRP_PAGES14TO15 0x00000080U /*!< Write protection of page 14 TO 15 */ 366 #define OB_WRP_PAGES16TO17 0x00000100U /*!< Write protection of page 16 TO 17 */ 367 #define OB_WRP_PAGES18TO19 0x00000200U /*!< Write protection of page 18 TO 19 */ 368 #define OB_WRP_PAGES20TO21 0x00000400U /*!< Write protection of page 20 TO 21 */ 369 #define OB_WRP_PAGES22TO23 0x00000800U /*!< Write protection of page 22 TO 23 */ 370 #define OB_WRP_PAGES24TO25 0x00001000U /*!< Write protection of page 24 TO 25 */ 371 #define OB_WRP_PAGES26TO27 0x00002000U /*!< Write protection of page 26 TO 27 */ 372 #define OB_WRP_PAGES28TO29 0x00004000U /*!< Write protection of page 28 TO 29 */ 373 #define OB_WRP_PAGES30TO31 0x00008000U /*!< Write protection of page 30 TO 31 */ 374 #define OB_WRP_PAGES32TO33 0x00010000U /*!< Write protection of page 32 TO 33 */ 375 #define OB_WRP_PAGES34TO35 0x00020000U /*!< Write protection of page 34 TO 35 */ 376 #define OB_WRP_PAGES36TO37 0x00040000U /*!< Write protection of page 36 TO 37 */ 377 #define OB_WRP_PAGES38TO39 0x00080000U /*!< Write protection of page 38 TO 39 */ 378 #define OB_WRP_PAGES40TO41 0x00100000U /*!< Write protection of page 40 TO 41 */ 379 #define OB_WRP_PAGES42TO43 0x00200000U /*!< Write protection of page 42 TO 43 */ 380 #define OB_WRP_PAGES44TO45 0x00400000U /*!< Write protection of page 44 TO 45 */ 381 #define OB_WRP_PAGES46TO47 0x00800000U /*!< Write protection of page 46 TO 47 */ 382 #define OB_WRP_PAGES48TO49 0x01000000U /*!< Write protection of page 48 TO 49 */ 383 #define OB_WRP_PAGES50TO51 0x02000000U /*!< Write protection of page 50 TO 51 */ 384 #define OB_WRP_PAGES52TO53 0x04000000U /*!< Write protection of page 52 TO 53 */ 385 #define OB_WRP_PAGES54TO55 0x08000000U /*!< Write protection of page 54 TO 55 */ 386 #define OB_WRP_PAGES56TO57 0x10000000U /*!< Write protection of page 56 TO 57 */ 387 #define OB_WRP_PAGES58TO59 0x20000000U /*!< Write protection of page 58 TO 59 */ 388 #define OB_WRP_PAGES60TO61 0x40000000U /*!< Write protection of page 60 TO 61 */ 389 #define OB_WRP_PAGES62TO127 0x80000000U /*!< Write protection of page 62 TO 127 */ 390 #define OB_WRP_PAGES62TO255 0x80000000U /*!< Write protection of page 62 TO 255 */ 391 #define OB_WRP_PAGES62TO511 0x80000000U /*!< Write protection of page 62 TO 511 */ 392 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 393 /* STM32F101xG || STM32F103xG */ 394 /* STM32F105xC || STM32F107xC */ 395 396 #define OB_WRP_ALLPAGES 0xFFFFFFFFU /*!< Write protection of all Pages */ 397 398 /* Low Density */ 399 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) 400 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 401 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 402 403 /* Medium Density */ 404 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 405 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 406 #define OB_WRP_PAGES32TO63MASK 0x0000FF00U 407 #define OB_WRP_PAGES64TO95MASK 0x00FF0000U 408 #define OB_WRP_PAGES96TO127MASK 0xFF000000U 409 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 410 411 /* High Density */ 412 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) 413 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 414 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 415 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 416 #define OB_WRP_PAGES48TO255MASK 0xFF000000U 417 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 418 419 /* XL Density */ 420 #if defined(STM32F101xG) || defined(STM32F103xG) 421 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 422 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 423 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 424 #define OB_WRP_PAGES48TO511MASK 0xFF000000U 425 #endif /* STM32F101xG || STM32F103xG */ 426 427 /* Connectivity line devices */ 428 #if defined(STM32F105xC) || defined(STM32F107xC) 429 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 430 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 431 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 432 #define OB_WRP_PAGES48TO127MASK 0xFF000000U 433 #endif /* STM32F105xC || STM32F107xC */ 434 435 /** 436 * @} 437 */ 438 439 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection 440 * @{ 441 */ 442 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) 443 #define OB_RDP_LEVEL_1 ((uint8_t)0x00) 444 /** 445 * @} 446 */ 447 448 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog 449 * @{ 450 */ 451 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ 452 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ 453 /** 454 * @} 455 */ 456 457 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP 458 * @{ 459 */ 460 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ 461 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ 462 /** 463 * @} 464 */ 465 466 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY 467 * @{ 468 */ 469 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ 470 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ 471 /** 472 * @} 473 */ 474 475 #if defined(FLASH_BANK2_END) 476 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 477 * @{ 478 */ 479 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ 480 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ 481 /** 482 * @} 483 */ 484 #endif /* FLASH_BANK2_END */ 485 486 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address 487 * @{ 488 */ 489 #define OB_DATA_ADDRESS_DATA0 0x1FFFF804U 490 #define OB_DATA_ADDRESS_DATA1 0x1FFFF806U 491 /** 492 * @} 493 */ 494 495 /** 496 * @} 497 */ 498 499 /** @addtogroup FLASHEx_Constants 500 * @{ 501 */ 502 503 /** @defgroup FLASH_Flag_definition Flag definition 504 * @brief Flag definition 505 * @{ 506 */ 507 #if defined(FLASH_BANK2_END) 508 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ 509 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ 510 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ 511 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ 512 513 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ 514 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ 515 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ 516 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ 517 518 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16U) /*!< FLASH Bank2 Busy flag */ 519 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16U) /*!< FLASH Bank2 Programming error flag */ 520 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16U) /*!< FLASH Bank2 Write protected error flag */ 521 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16U) /*!< FLASH Bank2 End of Operation flag */ 522 523 #else 524 525 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 526 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ 527 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ 528 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ 529 530 #endif 531 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8U | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ 532 /** 533 * @} 534 */ 535 536 /** @defgroup FLASH_Interrupt_definition Interrupt definition 537 * @brief FLASH Interrupt definition 538 * @{ 539 */ 540 #if defined(FLASH_BANK2_END) 541 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ 542 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ 543 544 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ 545 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ 546 547 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16U) /*!< End of FLASH Operation Interrupt source Bank2 */ 548 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16U) /*!< Error Interrupt source Bank2 */ 549 550 #else 551 552 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ 553 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ 554 555 #endif 556 /** 557 * @} 558 */ 559 560 /** 561 * @} 562 */ 563 564 /** 565 * @} 566 */ 567 568 /* Exported macro ------------------------------------------------------------*/ 569 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros 570 * @{ 571 */ 572 573 /** @defgroup FLASH_Interrupt Interrupt 574 * @brief macros to handle FLASH interrupts 575 * @{ 576 */ 577 578 #if defined(FLASH_BANK2_END) 579 /** 580 * @brief Enable the specified FLASH interrupt. 581 * @param __INTERRUPT__ FLASH interrupt 582 * This parameter can be any combination of the following values: 583 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 584 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 585 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 586 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 587 * @retval none 588 */ 589 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ 590 /* Enable Bank1 IT */ \ 591 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 592 /* Enable Bank2 IT */ \ 593 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 594 } while(0U) 595 596 /** 597 * @brief Disable the specified FLASH interrupt. 598 * @param __INTERRUPT__ FLASH interrupt 599 * This parameter can be any combination of the following values: 600 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 601 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 602 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 603 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 604 * @retval none 605 */ 606 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ 607 /* Disable Bank1 IT */ \ 608 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 609 /* Disable Bank2 IT */ \ 610 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 611 } while(0U) 612 613 /** 614 * @brief Get the specified FLASH flag status. 615 * @param __FLAG__ specifies the FLASH flag to check. 616 * This parameter can be one of the following values: 617 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 618 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 619 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 620 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 621 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 622 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 623 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 624 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 625 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 626 * @retval The new state of __FLAG__ (SET or RESET). 627 */ 628 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 629 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 630 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ 631 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ 632 (FLASH->SR2 & ((__FLAG__) >> 16U)))) 633 634 /** 635 * @brief Clear the specified FLASH flag. 636 * @param __FLAG__ specifies the FLASH flags to clear. 637 * This parameter can be any combination of the following values: 638 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 639 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 640 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 641 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 642 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 643 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 644 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 645 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 646 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 647 * @retval none 648 */ 649 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 650 /* Clear FLASH_FLAG_OPTVERR flag */ \ 651 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 652 { \ 653 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 654 } \ 655 else { \ 656 /* Clear Flag in Bank1 */ \ 657 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ 658 { \ 659 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ 660 } \ 661 /* Clear Flag in Bank2 */ \ 662 if (((__FLAG__) >> 16U) != RESET) \ 663 { \ 664 FLASH->SR2 = ((__FLAG__) >> 16U); \ 665 } \ 666 } \ 667 } while(0U) 668 #else 669 /** 670 * @brief Enable the specified FLASH interrupt. 671 * @param __INTERRUPT__ FLASH interrupt 672 * This parameter can be any combination of the following values: 673 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 674 * @arg @ref FLASH_IT_ERR Error Interrupt 675 * @retval none 676 */ 677 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) 678 679 /** 680 * @brief Disable the specified FLASH interrupt. 681 * @param __INTERRUPT__ FLASH interrupt 682 * This parameter can be any combination of the following values: 683 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 684 * @arg @ref FLASH_IT_ERR Error Interrupt 685 * @retval none 686 */ 687 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) 688 689 /** 690 * @brief Get the specified FLASH flag status. 691 * @param __FLAG__ specifies the FLASH flag to check. 692 * This parameter can be one of the following values: 693 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 694 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 695 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 696 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag 697 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 698 * @retval The new state of __FLAG__ (SET or RESET). 699 */ 700 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 701 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 702 (FLASH->SR & (__FLAG__))) 703 /** 704 * @brief Clear the specified FLASH flag. 705 * @param __FLAG__ specifies the FLASH flags to clear. 706 * This parameter can be any combination of the following values: 707 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 708 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 709 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 710 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 711 * @retval none 712 */ 713 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 714 /* Clear FLASH_FLAG_OPTVERR flag */ \ 715 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 716 { \ 717 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 718 } \ 719 else { \ 720 /* Clear Flag in Bank1 */ \ 721 FLASH->SR = (__FLAG__); \ 722 } \ 723 } while(0U) 724 725 #endif 726 727 /** 728 * @} 729 */ 730 731 /** 732 * @} 733 */ 734 735 /* Exported functions --------------------------------------------------------*/ 736 /** @addtogroup FLASHEx_Exported_Functions 737 * @{ 738 */ 739 740 /** @addtogroup FLASHEx_Exported_Functions_Group1 741 * @{ 742 */ 743 /* IO operation functions *****************************************************/ 744 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, 745 uint32_t *PageError); 746 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 747 748 /** 749 * @} 750 */ 751 752 /** @addtogroup FLASHEx_Exported_Functions_Group2 753 * @{ 754 */ 755 /* Peripheral Control functions ***********************************************/ 756 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); 757 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 758 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 759 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); 760 /** 761 * @} 762 */ 763 764 /** 765 * @} 766 */ 767 768 /** 769 * @} 770 */ 771 772 /** 773 * @} 774 */ 775 #ifdef __cplusplus 776 } 777 #endif 778 779 #endif /* __STM32F1xx_HAL_FLASH_EX_H */ 780