tdse-tp0_03-hw_sw_test

FIUBA - Electrónica - Taller de Sistemas Embebidos - Trabajo Práctico N°: 0 - Proyecto N°: 03
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Core/Startup/startup_stm32f103rbtx.s (9725B)
   1 /**
   2   *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
   3   * @file      startup_stm32f103xb.s
   4   * @author    MCD Application Team
   5   * @brief     STM32F103xB Devices vector table for Atollic toolchain.
   6   *            This module performs:
   7   *                - Set the initial SP
   8   *                - Set the initial PC == Reset_Handler,
   9   *                - Set the vector table entries with the exceptions ISR address
  10   *                - Configure the clock system   
  11   *                - Branches to main in the C library (which eventually
  12   *                  calls main()).
  13   *            After Reset the Cortex-M3 processor is in Thread mode,
  14   *            priority is Privileged, and the Stack is set to Main.
  15   ******************************************************************************
  16   * @attention
  17   *
  18   * Copyright (c) 2017-2021 STMicroelectronics.
  19   * All rights reserved.
  20   *
  21   * This software is licensed under terms that can be found in the LICENSE file
  22   * in the root directory of this software component.
  23   * If no LICENSE file comes with this software, it is provided AS-IS.
  24   *
  25   ******************************************************************************
  26   */
  27 
  28   .syntax unified
  29   .cpu cortex-m3
  30   .fpu softvfp
  31   .thumb
  32 
  33 .global g_pfnVectors
  34 .global Default_Handler
  35 
  36 /* start address for the initialization values of the .data section.
  37 defined in linker script */
  38 .word _sidata
  39 /* start address for the .data section. defined in linker script */
  40 .word _sdata
  41 /* end address for the .data section. defined in linker script */
  42 .word _edata
  43 /* start address for the .bss section. defined in linker script */
  44 .word _sbss
  45 /* end address for the .bss section. defined in linker script */
  46 .word _ebss
  47 
  48 .equ  BootRAM, 0xF108F85F
  49 /**
  50  * @brief  This is the code that gets called when the processor first
  51  *          starts execution following a reset event. Only the absolutely
  52  *          necessary set is performed, after which the application
  53  *          supplied main() routine is called.
  54  * @param  None
  55  * @retval : None
  56 */
  57 
  58   .section .text.Reset_Handler
  59   .weak Reset_Handler
  60   .type Reset_Handler, %function
  61 Reset_Handler:
  62 
  63 /* Call the clock system initialization function.*/
  64     bl  SystemInit
  65 
  66 /* Copy the data segment initializers from flash to SRAM */
  67   ldr r0, =_sdata
  68   ldr r1, =_edata
  69   ldr r2, =_sidata
  70   movs r3, #0
  71   b LoopCopyDataInit
  72 
  73 CopyDataInit:
  74   ldr r4, [r2, r3]
  75   str r4, [r0, r3]
  76   adds r3, r3, #4
  77 
  78 LoopCopyDataInit:
  79   adds r4, r0, r3
  80   cmp r4, r1
  81   bcc CopyDataInit
  82   
  83 /* Zero fill the bss segment. */
  84   ldr r2, =_sbss
  85   ldr r4, =_ebss
  86   movs r3, #0
  87   b LoopFillZerobss
  88 
  89 FillZerobss:
  90   str  r3, [r2]
  91   adds r2, r2, #4
  92 
  93 LoopFillZerobss:
  94   cmp r2, r4
  95   bcc FillZerobss
  96 
  97 /* Call static constructors */
  98     bl __libc_init_array
  99 /* Call the application's entry point.*/
 100   bl main
 101   bx lr
 102 .size Reset_Handler, .-Reset_Handler
 103 
 104 /**
 105  * @brief  This is the code that gets called when the processor receives an
 106  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 107  *         the system state for examination by a debugger.
 108  *
 109  * @param  None
 110  * @retval : None
 111 */
 112     .section .text.Default_Handler,"ax",%progbits
 113 Default_Handler:
 114 Infinite_Loop:
 115   b Infinite_Loop
 116   .size Default_Handler, .-Default_Handler
 117 /******************************************************************************
 118 *
 119 * The minimal vector table for a Cortex M3.  Note that the proper constructs
 120 * must be placed on this to ensure that it ends up at physical address
 121 * 0x0000.0000.
 122 *
 123 ******************************************************************************/
 124   .section .isr_vector,"a",%progbits
 125   .type g_pfnVectors, %object
 126   .size g_pfnVectors, .-g_pfnVectors
 127 
 128 
 129 g_pfnVectors:
 130 
 131   .word _estack
 132   .word Reset_Handler
 133   .word NMI_Handler
 134   .word HardFault_Handler
 135   .word MemManage_Handler
 136   .word BusFault_Handler
 137   .word UsageFault_Handler
 138   .word 0
 139   .word 0
 140   .word 0
 141   .word 0
 142   .word SVC_Handler
 143   .word DebugMon_Handler
 144   .word 0
 145   .word PendSV_Handler
 146   .word SysTick_Handler
 147   .word WWDG_IRQHandler
 148   .word PVD_IRQHandler
 149   .word TAMPER_IRQHandler
 150   .word RTC_IRQHandler
 151   .word FLASH_IRQHandler
 152   .word RCC_IRQHandler
 153   .word EXTI0_IRQHandler
 154   .word EXTI1_IRQHandler
 155   .word EXTI2_IRQHandler
 156   .word EXTI3_IRQHandler
 157   .word EXTI4_IRQHandler
 158   .word DMA1_Channel1_IRQHandler
 159   .word DMA1_Channel2_IRQHandler
 160   .word DMA1_Channel3_IRQHandler
 161   .word DMA1_Channel4_IRQHandler
 162   .word DMA1_Channel5_IRQHandler
 163   .word DMA1_Channel6_IRQHandler
 164   .word DMA1_Channel7_IRQHandler
 165   .word ADC1_2_IRQHandler
 166   .word USB_HP_CAN1_TX_IRQHandler
 167   .word USB_LP_CAN1_RX0_IRQHandler
 168   .word CAN1_RX1_IRQHandler
 169   .word CAN1_SCE_IRQHandler
 170   .word EXTI9_5_IRQHandler
 171   .word TIM1_BRK_IRQHandler
 172   .word TIM1_UP_IRQHandler
 173   .word TIM1_TRG_COM_IRQHandler
 174   .word TIM1_CC_IRQHandler
 175   .word TIM2_IRQHandler
 176   .word TIM3_IRQHandler
 177   .word TIM4_IRQHandler
 178   .word I2C1_EV_IRQHandler
 179   .word I2C1_ER_IRQHandler
 180   .word I2C2_EV_IRQHandler
 181   .word I2C2_ER_IRQHandler
 182   .word SPI1_IRQHandler
 183   .word SPI2_IRQHandler
 184   .word USART1_IRQHandler
 185   .word USART2_IRQHandler
 186   .word USART3_IRQHandler
 187   .word EXTI15_10_IRQHandler
 188   .word RTC_Alarm_IRQHandler
 189   .word USBWakeUp_IRQHandler
 190   .word 0
 191   .word 0
 192   .word 0
 193   .word 0
 194   .word 0
 195   .word 0
 196   .word 0
 197   .word BootRAM          /* @0x108. This is for boot in RAM mode for
 198                             STM32F10x Medium Density devices. */
 199 
 200 /*******************************************************************************
 201 *
 202 * Provide weak aliases for each Exception handler to the Default_Handler.
 203 * As they are weak aliases, any function with the same name will override
 204 * this definition.
 205 *
 206 *******************************************************************************/
 207 
 208   .weak NMI_Handler
 209   .thumb_set NMI_Handler,Default_Handler
 210 
 211   .weak HardFault_Handler
 212   .thumb_set HardFault_Handler,Default_Handler
 213 
 214   .weak MemManage_Handler
 215   .thumb_set MemManage_Handler,Default_Handler
 216 
 217   .weak BusFault_Handler
 218   .thumb_set BusFault_Handler,Default_Handler
 219 
 220   .weak UsageFault_Handler
 221   .thumb_set UsageFault_Handler,Default_Handler
 222 
 223   .weak SVC_Handler
 224   .thumb_set SVC_Handler,Default_Handler
 225 
 226   .weak DebugMon_Handler
 227   .thumb_set DebugMon_Handler,Default_Handler
 228 
 229   .weak PendSV_Handler
 230   .thumb_set PendSV_Handler,Default_Handler
 231 
 232   .weak SysTick_Handler
 233   .thumb_set SysTick_Handler,Default_Handler
 234 
 235   .weak WWDG_IRQHandler
 236   .thumb_set WWDG_IRQHandler,Default_Handler
 237 
 238   .weak PVD_IRQHandler
 239   .thumb_set PVD_IRQHandler,Default_Handler
 240 
 241   .weak TAMPER_IRQHandler
 242   .thumb_set TAMPER_IRQHandler,Default_Handler
 243 
 244   .weak RTC_IRQHandler
 245   .thumb_set RTC_IRQHandler,Default_Handler
 246 
 247   .weak FLASH_IRQHandler
 248   .thumb_set FLASH_IRQHandler,Default_Handler
 249 
 250   .weak RCC_IRQHandler
 251   .thumb_set RCC_IRQHandler,Default_Handler
 252 
 253   .weak EXTI0_IRQHandler
 254   .thumb_set EXTI0_IRQHandler,Default_Handler
 255 
 256   .weak EXTI1_IRQHandler
 257   .thumb_set EXTI1_IRQHandler,Default_Handler
 258 
 259   .weak EXTI2_IRQHandler
 260   .thumb_set EXTI2_IRQHandler,Default_Handler
 261 
 262   .weak EXTI3_IRQHandler
 263   .thumb_set EXTI3_IRQHandler,Default_Handler
 264 
 265   .weak EXTI4_IRQHandler
 266   .thumb_set EXTI4_IRQHandler,Default_Handler
 267 
 268   .weak DMA1_Channel1_IRQHandler
 269   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 270 
 271   .weak DMA1_Channel2_IRQHandler
 272   .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 273 
 274   .weak DMA1_Channel3_IRQHandler
 275   .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 276 
 277   .weak DMA1_Channel4_IRQHandler
 278   .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 279 
 280   .weak DMA1_Channel5_IRQHandler
 281   .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 282 
 283   .weak DMA1_Channel6_IRQHandler
 284   .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 285 
 286   .weak DMA1_Channel7_IRQHandler
 287   .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 288 
 289   .weak ADC1_2_IRQHandler
 290   .thumb_set ADC1_2_IRQHandler,Default_Handler
 291 
 292   .weak USB_HP_CAN1_TX_IRQHandler
 293   .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
 294 
 295   .weak USB_LP_CAN1_RX0_IRQHandler
 296   .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
 297 
 298   .weak CAN1_RX1_IRQHandler
 299   .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 300 
 301   .weak CAN1_SCE_IRQHandler
 302   .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 303 
 304   .weak EXTI9_5_IRQHandler
 305   .thumb_set EXTI9_5_IRQHandler,Default_Handler
 306 
 307   .weak TIM1_BRK_IRQHandler
 308   .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 309 
 310   .weak TIM1_UP_IRQHandler
 311   .thumb_set TIM1_UP_IRQHandler,Default_Handler
 312 
 313   .weak TIM1_TRG_COM_IRQHandler
 314   .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 315 
 316   .weak TIM1_CC_IRQHandler
 317   .thumb_set TIM1_CC_IRQHandler,Default_Handler
 318 
 319   .weak TIM2_IRQHandler
 320   .thumb_set TIM2_IRQHandler,Default_Handler
 321 
 322   .weak TIM3_IRQHandler
 323   .thumb_set TIM3_IRQHandler,Default_Handler
 324 
 325   .weak TIM4_IRQHandler
 326   .thumb_set TIM4_IRQHandler,Default_Handler
 327 
 328   .weak I2C1_EV_IRQHandler
 329   .thumb_set I2C1_EV_IRQHandler,Default_Handler
 330 
 331   .weak I2C1_ER_IRQHandler
 332   .thumb_set I2C1_ER_IRQHandler,Default_Handler
 333 
 334   .weak I2C2_EV_IRQHandler
 335   .thumb_set I2C2_EV_IRQHandler,Default_Handler
 336 
 337   .weak I2C2_ER_IRQHandler
 338   .thumb_set I2C2_ER_IRQHandler,Default_Handler
 339 
 340   .weak SPI1_IRQHandler
 341   .thumb_set SPI1_IRQHandler,Default_Handler
 342 
 343   .weak SPI2_IRQHandler
 344   .thumb_set SPI2_IRQHandler,Default_Handler
 345 
 346   .weak USART1_IRQHandler
 347   .thumb_set USART1_IRQHandler,Default_Handler
 348 
 349   .weak USART2_IRQHandler
 350   .thumb_set USART2_IRQHandler,Default_Handler
 351 
 352   .weak USART3_IRQHandler
 353   .thumb_set USART3_IRQHandler,Default_Handler
 354 
 355   .weak EXTI15_10_IRQHandler
 356   .thumb_set EXTI15_10_IRQHandler,Default_Handler
 357 
 358   .weak RTC_Alarm_IRQHandler
 359   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 360 
 361   .weak USBWakeUp_IRQHandler
 362   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 363 
 364