repos/TA147

Ejecicios y trabajos prácticos de la materia Taller de Sistemas Digitales (TA147)
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vhdl/README.md (12 lines)

VHDL Examples

NOTE: All vhdl containing keyword wait is not synthesizable, its only purpose is to test the device. In that case the best practice is to separate the module containing the device itself from the module containing the test case. Thats why in the dev folder modules are located on the non _tb ending file, and the test case, containing the non synthesizable parts are located on files ending with _tb.

Resources used

Basic VHDL course

   1 # VHDL Examples
   2 
   3 > NOTE: All vhdl containing keyword `wait` is not synthesizable, its only
   4 > purpose is to test the device. In that case the best practice is to separate
   5 > the module containing the device itself from the module containing the test
   6 > case. Thats why in the `dev` folder modules are located on the non `_tb`
   7 > ending file, and the test case, containing the non synthesizable parts are
   8 > located on files ending with `_tb`.
   9 
  10 ## Resources used
  11 
  12 [Basic VHDL course](https://www.youtube.com/playlist?list=PLIbRYKjjYOPkhpxnkQ0fwTXnmgsiCMcVV)