firmware-nucleo/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rtc.h (31180B)
1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_ll_rtc.h 4 * @author MCD Application Team 5 * @brief Header file of RTC LL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F1xx_LL_RTC_H 21 #define __STM32F1xx_LL_RTC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f1xx.h" 29 30 /** @addtogroup STM32F1xx_LL_Driver 31 * @{ 32 */ 33 34 #if defined(RTC) 35 36 /** @defgroup RTC_LL RTC 37 * @{ 38 */ 39 40 /* Private types -------------------------------------------------------------*/ 41 /* Private variables ---------------------------------------------------------*/ 42 /* Private constants ---------------------------------------------------------*/ 43 44 /* Private macros ------------------------------------------------------------*/ 45 #if defined(USE_FULL_LL_DRIVER) 46 /** @defgroup RTC_LL_Private_Macros RTC Private Macros 47 * @{ 48 */ 49 /** 50 * @} 51 */ 52 #endif /*USE_FULL_LL_DRIVER*/ 53 54 /* Exported types ------------------------------------------------------------*/ 55 #if defined(USE_FULL_LL_DRIVER) 56 /** @defgroup RTC_LL_ES_INIT RTC Exported Init structure 57 * @{ 58 */ 59 60 /** 61 * @brief RTC Init structures definition 62 */ 63 typedef struct 64 { 65 uint32_t AsynchPrescaler; /*!< Specifies the RTC Asynchronous Predivider value. 66 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFFF 67 68 This feature can be modified afterwards using unitary function 69 @ref LL_RTC_SetAsynchPrescaler(). */ 70 71 uint32_t OutPutSource; /*!< Specifies which signal will be routed to the RTC Tamper pin. 72 This parameter can be a value of @ref LL_RTC_Output_Source 73 74 This feature can be modified afterwards using unitary function 75 @ref LL_RTC_SetOutputSource(). */ 76 77 } LL_RTC_InitTypeDef; 78 79 /** 80 * @brief RTC Time structure definition 81 */ 82 typedef struct 83 { 84 uint8_t Hours; /*!< Specifies the RTC Time Hours. 85 This parameter must be a number between Min_Data = 0 and Max_Data = 23 */ 86 87 uint8_t Minutes; /*!< Specifies the RTC Time Minutes. 88 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ 89 90 uint8_t Seconds; /*!< Specifies the RTC Time Seconds. 91 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ 92 } LL_RTC_TimeTypeDef; 93 94 95 /** 96 * @brief RTC Alarm structure definition 97 */ 98 typedef struct 99 { 100 LL_RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members. */ 101 102 } LL_RTC_AlarmTypeDef; 103 104 /** 105 * @} 106 */ 107 #endif /* USE_FULL_LL_DRIVER */ 108 109 /* Exported constants --------------------------------------------------------*/ 110 /** @defgroup RTC_LL_Exported_Constants RTC Exported Constants 111 * @{ 112 */ 113 114 #if defined(USE_FULL_LL_DRIVER) 115 /** @defgroup RTC_LL_EC_FORMAT FORMAT 116 * @{ 117 */ 118 #define LL_RTC_FORMAT_BIN (0x000000000U) /*!< Binary data format */ 119 #define LL_RTC_FORMAT_BCD (0x000000001U) /*!< BCD data format */ 120 /** 121 * @} 122 */ 123 #endif /* USE_FULL_LL_DRIVER */ 124 125 /** @defgroup RTC_LL_EC_BKP BACKUP 126 * @{ 127 */ 128 #if RTC_BKP_NUMBER > 0 129 #define LL_RTC_BKP_DR1 (0x00000001U) 130 #define LL_RTC_BKP_DR2 (0x00000002U) 131 #define LL_RTC_BKP_DR3 (0x00000003U) 132 #define LL_RTC_BKP_DR4 (0x00000004U) 133 #define LL_RTC_BKP_DR5 (0x00000005U) 134 #define LL_RTC_BKP_DR6 (0x00000006U) 135 #define LL_RTC_BKP_DR7 (0x00000007U) 136 #define LL_RTC_BKP_DR8 (0x00000008U) 137 #define LL_RTC_BKP_DR9 (0x00000009U) 138 #define LL_RTC_BKP_DR10 (0x0000000AU) 139 #endif /* RTC_BKP_NUMBER > 0 */ 140 #if RTC_BKP_NUMBER > 10 141 #define LL_RTC_BKP_DR11 (0x00000010U) 142 #define LL_RTC_BKP_DR12 (0x00000011U) 143 #define LL_RTC_BKP_DR13 (0x00000012U) 144 #define LL_RTC_BKP_DR14 (0x00000013U) 145 #define LL_RTC_BKP_DR15 (0x00000014U) 146 #define LL_RTC_BKP_DR16 (0x00000015U) 147 #define LL_RTC_BKP_DR17 (0x00000016U) 148 #define LL_RTC_BKP_DR18 (0x00000017U) 149 #define LL_RTC_BKP_DR19 (0x00000018U) 150 #define LL_RTC_BKP_DR20 (0x00000019U) 151 #define LL_RTC_BKP_DR21 (0x0000001AU) 152 #define LL_RTC_BKP_DR22 (0x0000001BU) 153 #define LL_RTC_BKP_DR23 (0x0000001CU) 154 #define LL_RTC_BKP_DR24 (0x0000001DU) 155 #define LL_RTC_BKP_DR25 (0x0000001EU) 156 #define LL_RTC_BKP_DR26 (0x0000001FU) 157 #define LL_RTC_BKP_DR27 (0x00000020U) 158 #define LL_RTC_BKP_DR28 (0x00000021U) 159 #define LL_RTC_BKP_DR29 (0x00000022U) 160 #define LL_RTC_BKP_DR30 (0x00000023U) 161 #define LL_RTC_BKP_DR31 (0x00000024U) 162 #define LL_RTC_BKP_DR32 (0x00000025U) 163 #define LL_RTC_BKP_DR33 (0x00000026U) 164 #define LL_RTC_BKP_DR34 (0x00000027U) 165 #define LL_RTC_BKP_DR35 (0x00000028U) 166 #define LL_RTC_BKP_DR36 (0x00000029U) 167 #define LL_RTC_BKP_DR37 (0x0000002AU) 168 #define LL_RTC_BKP_DR38 (0x0000002BU) 169 #define LL_RTC_BKP_DR39 (0x0000002CU) 170 #define LL_RTC_BKP_DR40 (0x0000002DU) 171 #define LL_RTC_BKP_DR41 (0x0000002EU) 172 #define LL_RTC_BKP_DR42 (0x0000002FU) 173 #endif /* RTC_BKP_NUMBER > 10 */ 174 175 /** 176 * @} 177 */ 178 179 /** @defgroup RTC_LL_EC_TAMPLEVEL Tamper Active Level 180 * @{ 181 */ 182 #define LL_RTC_TAMPER_ACTIVELEVEL_LOW BKP_CR_TPAL /*!< A high level on the TAMPER pin resets all data backup registers (if TPE bit is set) */ 183 #define LL_RTC_TAMPER_ACTIVELEVEL_HIGH (0x00000000U) /*!< A low level on the TAMPER pin resets all data backup registers (if TPE bit is set) */ 184 185 /** 186 * @} 187 */ 188 189 /** @defgroup LL_RTC_Output_Source Clock Source to output on the Tamper Pin 190 * @{ 191 */ 192 #define LL_RTC_CALIB_OUTPUT_NONE (0x00000000U) /*!< Calibration output disabled */ 193 #define LL_RTC_CALIB_OUTPUT_RTCCLOCK BKP_RTCCR_CCO /*!< Calibration output is RTC Clock with a frequency divided by 64 on the TAMPER Pin */ 194 #define LL_RTC_CALIB_OUTPUT_ALARM BKP_RTCCR_ASOE /*!< Calibration output is Alarm pulse signal on the TAMPER pin */ 195 #define LL_RTC_CALIB_OUTPUT_SECOND (BKP_RTCCR_ASOS | BKP_RTCCR_ASOE) /*!< Calibration output is Second pulse signal on the TAMPER pin*/ 196 /** 197 * @} 198 */ 199 200 /** 201 * @} 202 */ 203 204 /* Exported macro ------------------------------------------------------------*/ 205 /** @defgroup RTC_LL_Exported_Macros RTC Exported Macros 206 * @{ 207 */ 208 209 /** @defgroup RTC_LL_EM_WRITE_READ Common Write and read registers Macros 210 * @{ 211 */ 212 213 /** 214 * @brief Write a value in RTC register 215 * @param __INSTANCE__ RTC Instance 216 * @param __REG__ Register to be written 217 * @param __VALUE__ Value to be written in the register 218 * @retval None 219 */ 220 #define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 221 222 /** 223 * @brief Read a value in RTC register 224 * @param __INSTANCE__ RTC Instance 225 * @param __REG__ Register to be read 226 * @retval Register value 227 */ 228 #define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 229 /** 230 * @} 231 */ 232 233 /** @defgroup RTC_LL_EM_Convert Convert helper Macros 234 * @{ 235 */ 236 237 /** 238 * @brief Helper macro to convert a value from 2 digit decimal format to BCD format 239 * @param __VALUE__ Byte to be converted 240 * @retval Converted byte 241 */ 242 #define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U)) 243 244 /** 245 * @brief Helper macro to convert a value from BCD format to 2 digit decimal format 246 * @param __VALUE__ BCD value to be converted 247 * @retval Converted byte 248 */ 249 #define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU)) 250 251 /** 252 * @} 253 */ 254 255 /** 256 * @} 257 */ 258 259 /* Exported functions --------------------------------------------------------*/ 260 /** @defgroup RTC_LL_Exported_Functions RTC Exported Functions 261 * @{ 262 */ 263 264 /** @defgroup RTC_LL_EF_Configuration Configuration 265 * @{ 266 */ 267 268 /** 269 * @brief Set Asynchronous prescaler factor 270 * @rmtoll PRLH PRL LL_RTC_SetAsynchPrescaler\n 271 * @rmtoll PRLL PRL LL_RTC_SetAsynchPrescaler\n 272 * @param RTCx RTC Instance 273 * @param AsynchPrescaler Value between Min_Data = 0 and Max_Data = 0xFFFFF 274 * @retval None 275 */ 276 __STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler) 277 { 278 MODIFY_REG(RTCx->PRLH, RTC_PRLH_PRL, (AsynchPrescaler >> 16)); 279 MODIFY_REG(RTCx->PRLL, RTC_PRLL_PRL, (AsynchPrescaler & RTC_PRLL_PRL)); 280 } 281 282 /** 283 * @brief Get Asynchronous prescaler factor 284 * @rmtoll DIVH DIV LL_RTC_GetDivider\n 285 * @rmtoll DIVL DIV LL_RTC_GetDivider\n 286 * @param RTCx RTC Instance 287 * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF 288 */ 289 __STATIC_INLINE uint32_t LL_RTC_GetDivider(RTC_TypeDef *RTCx) 290 { 291 register uint16_t Highprescaler = 0, Lowprescaler = 0; 292 Highprescaler = READ_REG(RTCx->DIVH & RTC_DIVH_RTC_DIV); 293 Lowprescaler = READ_REG(RTCx->DIVL & RTC_DIVL_RTC_DIV); 294 295 return (((uint32_t) Highprescaler << 16U) | Lowprescaler); 296 } 297 298 /** 299 * @brief Set Output Source 300 * @rmtoll RTCCR CCO LL_RTC_SetOutputSource 301 * @rmtoll RTCCR ASOE LL_RTC_SetOutputSource 302 * @rmtoll RTCCR ASOS LL_RTC_SetOutputSource 303 * @param BKPx BKP Instance 304 * @param OutputSource This parameter can be one of the following values: 305 * @arg @ref LL_RTC_CALIB_OUTPUT_NONE 306 * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK 307 * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM 308 * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND 309 * @retval None 310 */ 311 __STATIC_INLINE void LL_RTC_SetOutputSource(BKP_TypeDef *BKPx, uint32_t OutputSource) 312 { 313 MODIFY_REG(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), OutputSource); 314 } 315 316 /** 317 * @brief Get Output Source 318 * @rmtoll RTCCR CCO LL_RTC_GetOutPutSource 319 * @rmtoll RTCCR ASOE LL_RTC_GetOutPutSource 320 * @rmtoll RTCCR ASOS LL_RTC_GetOutPutSource 321 * @param BKPx BKP Instance 322 * @retval Returned value can be one of the following values: 323 * @arg @ref LL_RTC_CALIB_OUTPUT_NONE 324 * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK 325 * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM 326 * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND 327 */ 328 __STATIC_INLINE uint32_t LL_RTC_GetOutPutSource(BKP_TypeDef *BKPx) 329 { 330 return (uint32_t)(READ_BIT(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS))); 331 } 332 333 /** 334 * @brief Enable the write protection for RTC registers. 335 * @rmtoll CRL CNF LL_RTC_EnableWriteProtection 336 * @param RTCx RTC Instance 337 * @retval None 338 */ 339 __STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx) 340 { 341 CLEAR_BIT(RTCx->CRL, RTC_CRL_CNF); 342 } 343 344 /** 345 * @brief Disable the write protection for RTC registers. 346 * @rmtoll CRL RTC_CRL_CNF LL_RTC_DisableWriteProtection 347 * @param RTCx RTC Instance 348 * @retval None 349 */ 350 __STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx) 351 { 352 SET_BIT(RTCx->CRL, RTC_CRL_CNF); 353 } 354 355 /** 356 * @} 357 */ 358 359 /** @defgroup RTC_LL_EF_Time Time 360 * @{ 361 */ 362 363 /** 364 * @brief Set time counter in BCD format 365 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 366 * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function) 367 * @rmtoll CNTH CNT LL_RTC_TIME_Set\n 368 * CNTL CNT LL_RTC_TIME_Set\n 369 * @param RTCx RTC Instance 370 * @param TimeCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF 371 * @retval None 372 */ 373 __STATIC_INLINE void LL_RTC_TIME_Set(RTC_TypeDef *RTCx, uint32_t TimeCounter) 374 { 375 /* Set RTC COUNTER MSB word */ 376 WRITE_REG(RTCx->CNTH, (TimeCounter >> 16U)); 377 /* Set RTC COUNTER LSB word */ 378 WRITE_REG(RTCx->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); 379 } 380 381 /** 382 * @brief Get time counter in BCD format 383 * @rmtoll CNTH CNT LL_RTC_TIME_Get\n 384 * CNTL CNT LL_RTC_TIME_Get\n 385 * @param RTCx RTC Instance 386 * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF 387 */ 388 __STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx) 389 { 390 register uint16_t high = 0, low = 0; 391 392 high = READ_REG(RTCx->CNTH & RTC_CNTH_RTC_CNT); 393 low = READ_REG(RTCx->CNTL & RTC_CNTL_RTC_CNT); 394 return ((uint32_t)(((uint32_t) high << 16U) | low)); 395 } 396 397 /** 398 * @} 399 */ 400 401 /** @defgroup RTC_LL_EF_ALARM ALARM 402 * @{ 403 */ 404 405 /** 406 * @brief Set Alarm Counter 407 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 408 * @rmtoll ALRH ALR LL_RTC_ALARM_Set\n 409 * @rmtoll ALRL ALR LL_RTC_ALARM_Set\n 410 * @param RTCx RTC Instance 411 * @param AlarmCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF 412 * @retval None 413 */ 414 __STATIC_INLINE void LL_RTC_ALARM_Set(RTC_TypeDef *RTCx, uint32_t AlarmCounter) 415 { 416 /* Set RTC COUNTER MSB word */ 417 WRITE_REG(RTCx->ALRH, (AlarmCounter >> 16)); 418 /* Set RTC COUNTER LSB word */ 419 WRITE_REG(RTCx->ALRL, (AlarmCounter & RTC_ALRL_RTC_ALR)); 420 } 421 422 /** 423 * @brief Get Alarm Counter 424 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 425 * @rmtoll ALRH ALR LL_RTC_ALARM_Get\n 426 * @rmtoll ALRL ALR LL_RTC_ALARM_Get\n 427 * @param RTCx RTC Instance 428 * @retval None 429 */ 430 __STATIC_INLINE uint32_t LL_RTC_ALARM_Get(RTC_TypeDef *RTCx) 431 { 432 register uint16_t high = 0, low = 0; 433 434 high = READ_REG(RTCx->ALRH & RTC_ALRH_RTC_ALR); 435 low = READ_REG(RTCx->ALRL & RTC_ALRL_RTC_ALR); 436 437 return (((uint32_t) high << 16U) | low); 438 } 439 440 /** 441 * @} 442 */ 443 444 /** @defgroup RTC_LL_EF_Tamper Tamper 445 * @{ 446 */ 447 448 /** 449 * @brief Enable RTC_TAMPx input detection 450 * @rmtoll CR TPE LL_RTC_TAMPER_Enable\n 451 * @retval None 452 */ 453 __STATIC_INLINE void LL_RTC_TAMPER_Enable(BKP_TypeDef *BKPx) 454 { 455 SET_BIT(BKPx->CR, BKP_CR_TPE); 456 } 457 458 /** 459 * @brief Disable RTC_TAMPx Tamper 460 * @rmtoll CR TPE LL_RTC_TAMPER_Disable\n 461 * @retval None 462 */ 463 __STATIC_INLINE void LL_RTC_TAMPER_Disable(BKP_TypeDef *BKPx) 464 { 465 CLEAR_BIT(BKP->CR, BKP_CR_TPE); 466 } 467 468 /** 469 * @brief Enable Active level for Tamper input 470 * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n 471 * @param BKPx BKP Instance 472 * @param Tamper This parameter can be a combination of the following values: 473 * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_LOW 474 * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_HIGH 475 * @retval None 476 */ 477 __STATIC_INLINE void LL_RTC_TAMPER_SetActiveLevel(BKP_TypeDef *BKPx, uint32_t Tamper) 478 { 479 MODIFY_REG(BKPx->CR, BKP_CR_TPAL, Tamper); 480 } 481 482 /** 483 * @brief Disable Active level for Tamper input 484 * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n 485 * @retval None 486 */ 487 __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetActiveLevel(BKP_TypeDef *BKPx) 488 { 489 return (uint32_t)(READ_BIT(BKPx->CR, BKP_CR_TPAL)); 490 } 491 492 /** 493 * @} 494 */ 495 496 /** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers 497 * @{ 498 */ 499 500 /** 501 * @brief Writes a data in a specified RTC Backup data register. 502 * @rmtoll BKPDR DR LL_RTC_BKP_SetRegister 503 * @param BKPx BKP Instance 504 * @param BackupRegister This parameter can be one of the following values: 505 * @arg @ref LL_RTC_BKP_DR1 506 * @arg @ref LL_RTC_BKP_DR2 507 * @arg @ref LL_RTC_BKP_DR3 508 * @arg @ref LL_RTC_BKP_DR4 509 * @arg @ref LL_RTC_BKP_DR5 510 * @arg @ref LL_RTC_BKP_DR6 511 * @arg @ref LL_RTC_BKP_DR7 512 * @arg @ref LL_RTC_BKP_DR8 513 * @arg @ref LL_RTC_BKP_DR9 514 * @arg @ref LL_RTC_BKP_DR10 515 * @arg @ref LL_RTC_BKP_DR11 (*) 516 * @arg @ref LL_RTC_BKP_DR12 (*) 517 * @arg @ref LL_RTC_BKP_DR13 (*) 518 * @arg @ref LL_RTC_BKP_DR14 (*) 519 * @arg @ref LL_RTC_BKP_DR15 (*) 520 * @arg @ref LL_RTC_BKP_DR16 (*) 521 * @arg @ref LL_RTC_BKP_DR17 (*) 522 * @arg @ref LL_RTC_BKP_DR18 (*) 523 * @arg @ref LL_RTC_BKP_DR19 (*) 524 * @arg @ref LL_RTC_BKP_DR20 (*) 525 * @arg @ref LL_RTC_BKP_DR21 (*) 526 * @arg @ref LL_RTC_BKP_DR22 (*) 527 * @arg @ref LL_RTC_BKP_DR23 (*) 528 * @arg @ref LL_RTC_BKP_DR24 (*) 529 * @arg @ref LL_RTC_BKP_DR25 (*) 530 * @arg @ref LL_RTC_BKP_DR26 (*) 531 * @arg @ref LL_RTC_BKP_DR27 (*) 532 * @arg @ref LL_RTC_BKP_DR28 (*) 533 * @arg @ref LL_RTC_BKP_DR29 (*) 534 * @arg @ref LL_RTC_BKP_DR30 (*) 535 * @arg @ref LL_RTC_BKP_DR31 (*) 536 * @arg @ref LL_RTC_BKP_DR32 (*) 537 * @arg @ref LL_RTC_BKP_DR33 (*) 538 * @arg @ref LL_RTC_BKP_DR34 (*) 539 * @arg @ref LL_RTC_BKP_DR35 (*) 540 * @arg @ref LL_RTC_BKP_DR36 (*) 541 * @arg @ref LL_RTC_BKP_DR37 (*) 542 * @arg @ref LL_RTC_BKP_DR38 (*) 543 * @arg @ref LL_RTC_BKP_DR39 (*) 544 * @arg @ref LL_RTC_BKP_DR40 (*) 545 * @arg @ref LL_RTC_BKP_DR41 (*) 546 * @arg @ref LL_RTC_BKP_DR42 (*) 547 * (*) value not defined in all devices. 548 * @param Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF 549 * @retval None 550 */ 551 __STATIC_INLINE void LL_RTC_BKP_SetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister, uint32_t Data) 552 { 553 register uint32_t tmp = 0U; 554 555 tmp = (uint32_t)BKP_BASE; 556 tmp += (BackupRegister * 4U); 557 558 /* Write the specified register */ 559 *(__IO uint32_t *)tmp = (uint32_t)Data; 560 } 561 562 /** 563 * @brief Reads data from the specified RTC Backup data Register. 564 * @rmtoll BKPDR DR LL_RTC_BKP_GetRegister 565 * @param BKPx BKP Instance 566 * @param BackupRegister This parameter can be one of the following values: 567 * @arg @ref LL_RTC_BKP_DR1 568 * @arg @ref LL_RTC_BKP_DR2 569 * @arg @ref LL_RTC_BKP_DR3 570 * @arg @ref LL_RTC_BKP_DR4 571 * @arg @ref LL_RTC_BKP_DR5 572 * @arg @ref LL_RTC_BKP_DR6 573 * @arg @ref LL_RTC_BKP_DR7 574 * @arg @ref LL_RTC_BKP_DR8 575 * @arg @ref LL_RTC_BKP_DR9 576 * @arg @ref LL_RTC_BKP_DR10 577 * @arg @ref LL_RTC_BKP_DR11 (*) 578 * @arg @ref LL_RTC_BKP_DR12 (*) 579 * @arg @ref LL_RTC_BKP_DR13 (*) 580 * @arg @ref LL_RTC_BKP_DR14 (*) 581 * @arg @ref LL_RTC_BKP_DR15 (*) 582 * @arg @ref LL_RTC_BKP_DR16 (*) 583 * @arg @ref LL_RTC_BKP_DR17 (*) 584 * @arg @ref LL_RTC_BKP_DR18 (*) 585 * @arg @ref LL_RTC_BKP_DR19 (*) 586 * @arg @ref LL_RTC_BKP_DR20 (*) 587 * @arg @ref LL_RTC_BKP_DR21 (*) 588 * @arg @ref LL_RTC_BKP_DR22 (*) 589 * @arg @ref LL_RTC_BKP_DR23 (*) 590 * @arg @ref LL_RTC_BKP_DR24 (*) 591 * @arg @ref LL_RTC_BKP_DR25 (*) 592 * @arg @ref LL_RTC_BKP_DR26 (*) 593 * @arg @ref LL_RTC_BKP_DR27 (*) 594 * @arg @ref LL_RTC_BKP_DR28 (*) 595 * @arg @ref LL_RTC_BKP_DR29 (*) 596 * @arg @ref LL_RTC_BKP_DR30 (*) 597 * @arg @ref LL_RTC_BKP_DR31 (*) 598 * @arg @ref LL_RTC_BKP_DR32 (*) 599 * @arg @ref LL_RTC_BKP_DR33 (*) 600 * @arg @ref LL_RTC_BKP_DR34 (*) 601 * @arg @ref LL_RTC_BKP_DR35 (*) 602 * @arg @ref LL_RTC_BKP_DR36 (*) 603 * @arg @ref LL_RTC_BKP_DR37 (*) 604 * @arg @ref LL_RTC_BKP_DR38 (*) 605 * @arg @ref LL_RTC_BKP_DR39 (*) 606 * @arg @ref LL_RTC_BKP_DR40 (*) 607 * @arg @ref LL_RTC_BKP_DR41 (*) 608 * @arg @ref LL_RTC_BKP_DR42 (*) 609 * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF 610 */ 611 __STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister) 612 { 613 register uint32_t tmp = 0U; 614 615 tmp = (uint32_t)BKP_BASE; 616 tmp += (BackupRegister * 4U); 617 618 /* Read the specified register */ 619 return ((*(__IO uint32_t *)tmp) & BKP_DR1_D); 620 } 621 622 /** 623 * @} 624 */ 625 626 /** @defgroup RTC_LL_EF_Calibration Calibration 627 * @{ 628 */ 629 630 /** 631 * @brief Set the coarse digital calibration 632 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 633 * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function) 634 * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n 635 * @param BKPx RTC Instance 636 * @param Value value of coarse calibration expressed in ppm (coded on 5 bits) 637 * @note This Calibration value should be between 0 and 121 when using positive sign with a 4-ppm step. 638 * @retval None 639 */ 640 __STATIC_INLINE void LL_RTC_CAL_SetCoarseDigital(BKP_TypeDef *BKPx, uint32_t Value) 641 { 642 MODIFY_REG(BKPx->RTCCR, BKP_RTCCR_CAL, Value); 643 } 644 645 /** 646 * @brief Get the coarse digital calibration value 647 * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n 648 * @param BKPx BKP Instance 649 * @retval value of coarse calibration expressed in ppm (coded on 5 bits) 650 */ 651 __STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigital(BKP_TypeDef *BKPx) 652 { 653 return (uint32_t)(READ_BIT(BKPx->RTCCR, BKP_RTCCR_CAL)); 654 } 655 /** 656 * @} 657 */ 658 659 /** @defgroup RTC_LL_EF_FLAG_Management FLAG_Management 660 * @{ 661 */ 662 663 /** 664 * @brief Get RTC_TAMPI Interruption detection flag 665 * @rmtoll CSR TIF LL_RTC_IsActiveFlag_TAMPI 666 * @param BKPx BKP Instance 667 * @retval State of bit (1 or 0). 668 */ 669 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPI(BKP_TypeDef *BKPx) 670 { 671 return (READ_BIT(BKPx->CSR, BKP_CSR_TIF) == (BKP_CSR_TIF)); 672 } 673 674 /** 675 * @brief Clear RTC_TAMP Interruption detection flag 676 * @rmtoll CSR CTI LL_RTC_ClearFlag_TAMPI 677 * @param BKPx BKP Instance 678 * @retval None 679 */ 680 __STATIC_INLINE void LL_RTC_ClearFlag_TAMPI(BKP_TypeDef *BKPx) 681 { 682 SET_BIT(BKPx->CSR, BKP_CSR_CTI); 683 } 684 685 /** 686 * @brief Get RTC_TAMPE Event detection flag 687 * @rmtoll CSR TEF LL_RTC_IsActiveFlag_TAMPE 688 * @param BKPx BKP Instance 689 * @retval State of bit (1 or 0). 690 */ 691 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPE(BKP_TypeDef *BKPx) 692 { 693 return (READ_BIT(BKPx->CSR, BKP_CSR_TEF) == (BKP_CSR_TEF)); 694 } 695 696 /** 697 * @brief Clear RTC_TAMPE Even detection flag 698 * @rmtoll CSR CTE LL_RTC_ClearFlag_TAMPE 699 * @param BKPx BKP Instance 700 * @retval None 701 */ 702 __STATIC_INLINE void LL_RTC_ClearFlag_TAMPE(BKP_TypeDef *BKPx) 703 { 704 SET_BIT(BKPx->CSR, BKP_CSR_CTE); 705 } 706 707 /** 708 * @brief Get Alarm flag 709 * @rmtoll CRL ALRF LL_RTC_IsActiveFlag_ALR 710 * @param RTCx RTC Instance 711 * @retval State of bit (1 or 0). 712 */ 713 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALR(RTC_TypeDef *RTCx) 714 { 715 return (READ_BIT(RTCx->CRL, RTC_CRL_ALRF) == (RTC_CRL_ALRF)); 716 } 717 718 /** 719 * @brief Clear Alarm flag 720 * @rmtoll CRL ALRF LL_RTC_ClearFlag_ALR 721 * @param RTCx RTC Instance 722 * @retval None 723 */ 724 __STATIC_INLINE void LL_RTC_ClearFlag_ALR(RTC_TypeDef *RTCx) 725 { 726 CLEAR_BIT(RTCx->CRL, RTC_CRL_ALRF); 727 } 728 729 /** 730 * @brief Get Registers synchronization flag 731 * @rmtoll CRL RSF LL_RTC_IsActiveFlag_RS 732 * @param RTCx RTC Instance 733 * @retval State of bit (1 or 0). 734 */ 735 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx) 736 { 737 return (READ_BIT(RTCx->CRL, RTC_CRL_RSF) == (RTC_CRL_RSF)); 738 } 739 740 /** 741 * @brief Clear Registers synchronization flag 742 * @rmtoll CRL RSF LL_RTC_ClearFlag_RS 743 * @param RTCx RTC Instance 744 * @retval None 745 */ 746 __STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx) 747 { 748 CLEAR_BIT(RTCx->CRL, RTC_CRL_RSF); 749 } 750 751 /** 752 * @brief Get Registers OverFlow flag 753 * @rmtoll CRL OWF LL_RTC_IsActiveFlag_OW 754 * @param RTCx RTC Instance 755 * @retval State of bit (1 or 0). 756 */ 757 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_OW(RTC_TypeDef *RTCx) 758 { 759 return (READ_BIT(RTCx->CRL, RTC_CRL_OWF) == (RTC_CRL_OWF)); 760 } 761 762 /** 763 * @brief Clear Registers OverFlow flag 764 * @rmtoll CRL OWF LL_RTC_ClearFlag_OW 765 * @param RTCx RTC Instance 766 * @retval None 767 */ 768 __STATIC_INLINE void LL_RTC_ClearFlag_OW(RTC_TypeDef *RTCx) 769 { 770 CLEAR_BIT(RTCx->CRL, RTC_CRL_OWF); 771 } 772 773 /** 774 * @brief Get Registers synchronization flag 775 * @rmtoll CRL SECF LL_RTC_IsActiveFlag_SEC 776 * @param RTCx RTC Instance 777 * @retval State of bit (1 or 0). 778 */ 779 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SEC(RTC_TypeDef *RTCx) 780 { 781 return (READ_BIT(RTCx->CRL, RTC_CRL_SECF) == (RTC_CRL_SECF)); 782 } 783 784 /** 785 * @brief Clear Registers synchronization flag 786 * @rmtoll CRL SECF LL_RTC_ClearFlag_SEC 787 * @param RTCx RTC Instance 788 * @retval None 789 */ 790 __STATIC_INLINE void LL_RTC_ClearFlag_SEC(RTC_TypeDef *RTCx) 791 { 792 CLEAR_BIT(RTCx->CRL, RTC_CRL_SECF); 793 } 794 795 /** 796 * @brief Get RTC Operation OFF status flag 797 * @rmtoll CRL RTOFF LL_RTC_IsActiveFlag_RTOF 798 * @param RTCx RTC Instance 799 * @retval State of bit (1 or 0). 800 */ 801 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RTOF(RTC_TypeDef *RTCx) 802 { 803 return (READ_BIT(RTCx->CRL, RTC_CRL_RTOFF) == (RTC_CRL_RTOFF)); 804 } 805 806 /** 807 * @} 808 */ 809 810 /** @defgroup RTC_LL_EF_IT_Management IT_Management 811 * @{ 812 */ 813 814 /** 815 * @brief Enable Alarm interrupt 816 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 817 * @rmtoll CRH ALRIE LL_RTC_EnableIT_ALR 818 * @param RTCx RTC Instance 819 * @retval None 820 */ 821 __STATIC_INLINE void LL_RTC_EnableIT_ALR(RTC_TypeDef *RTCx) 822 { 823 SET_BIT(RTCx->CRH, RTC_CRH_ALRIE); 824 } 825 826 /** 827 * @brief Disable Alarm interrupt 828 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 829 * @rmtoll CRH ALRIE LL_RTC_DisableIT_ALR 830 * @param RTCx RTC Instance 831 * @retval None 832 */ 833 __STATIC_INLINE void LL_RTC_DisableIT_ALR(RTC_TypeDef *RTCx) 834 { 835 CLEAR_BIT(RTCx->CRH, RTC_CRH_ALRIE); 836 } 837 838 /** 839 * @brief Check if Alarm interrupt is enabled or not 840 * @rmtoll CRH ALRIE LL_RTC_IsEnabledIT_ALR 841 * @param RTCx RTC Instance 842 * @retval State of bit (1 or 0). 843 */ 844 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALR(RTC_TypeDef *RTCx) 845 { 846 return (READ_BIT(RTCx->CRH, RTC_CRH_ALRIE) == (RTC_CRH_ALRIE)); 847 } 848 849 /** 850 * @brief Enable Second Interrupt interrupt 851 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 852 * @rmtoll CRH SECIE LL_RTC_EnableIT_SEC 853 * @param RTCx RTC Instance 854 * @retval None 855 */ 856 __STATIC_INLINE void LL_RTC_EnableIT_SEC(RTC_TypeDef *RTCx) 857 { 858 SET_BIT(RTCx->CRH, RTC_CRH_SECIE); 859 } 860 861 /** 862 * @brief Disable Second interrupt 863 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 864 * @rmtoll CRH SECIE LL_RTC_DisableIT_SEC 865 * @param RTCx RTC Instance 866 * @retval None 867 */ 868 __STATIC_INLINE void LL_RTC_DisableIT_SEC(RTC_TypeDef *RTCx) 869 { 870 CLEAR_BIT(RTCx->CRH, RTC_CRH_SECIE); 871 } 872 873 /** 874 * @brief Check if Second interrupt is enabled or not 875 * @rmtoll CRH SECIE LL_RTC_IsEnabledIT_SEC 876 * @param RTCx RTC Instance 877 * @retval State of bit (1 or 0). 878 */ 879 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_SEC(RTC_TypeDef *RTCx) 880 { 881 return (READ_BIT(RTCx->CRH, RTC_CRH_SECIE) == (RTC_CRH_SECIE)); 882 } 883 884 /** 885 * @brief Enable OverFlow interrupt 886 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 887 * @rmtoll CRH OWIE LL_RTC_EnableIT_OW 888 * @param RTCx RTC Instance 889 * @retval None 890 */ 891 __STATIC_INLINE void LL_RTC_EnableIT_OW(RTC_TypeDef *RTCx) 892 { 893 SET_BIT(RTCx->CRH, RTC_CRH_OWIE); 894 } 895 896 /** 897 * @brief Disable OverFlow interrupt 898 * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. 899 * @rmtoll CRH OWIE LL_RTC_DisableIT_OW 900 * @param RTCx RTC Instance 901 * @retval None 902 */ 903 __STATIC_INLINE void LL_RTC_DisableIT_OW(RTC_TypeDef *RTCx) 904 { 905 CLEAR_BIT(RTCx->CRH, RTC_CRH_OWIE); 906 } 907 908 /** 909 * @brief Check if OverFlow interrupt is enabled or not 910 * @rmtoll CRH OWIE LL_RTC_IsEnabledIT_OW 911 * @param RTCx RTC Instance 912 * @retval State of bit (1 or 0). 913 */ 914 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_OW(RTC_TypeDef *RTCx) 915 { 916 return (READ_BIT(RTCx->CRH, RTC_CRH_OWIE) == (RTC_CRH_OWIE)); 917 } 918 919 /** 920 * @brief Enable Tamper interrupt 921 * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP 922 * @param BKPx BKP Instance 923 * @retval None 924 */ 925 __STATIC_INLINE void LL_RTC_EnableIT_TAMP(BKP_TypeDef *BKPx) 926 { 927 SET_BIT(BKPx->CSR, BKP_CSR_TPIE); 928 } 929 930 /** 931 * @brief Disable Tamper interrupt 932 * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP 933 * @param BKPx BKP Instance 934 * @retval None 935 */ 936 __STATIC_INLINE void LL_RTC_DisableIT_TAMP(BKP_TypeDef *BKPx) 937 { 938 CLEAR_BIT(BKPx->CSR, BKP_CSR_TPIE); 939 } 940 941 /** 942 * @brief Check if all the TAMPER interrupts are enabled or not 943 * @rmtoll CSR TPIE LL_RTC_IsEnabledIT_TAMP 944 * @param BKPx BKP Instance 945 * @retval State of bit (1 or 0). 946 */ 947 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(BKP_TypeDef *BKPx) 948 { 949 return (READ_BIT(BKPx->CSR, BKP_CSR_TPIE) == BKP_CSR_TPIE); 950 } 951 /** 952 * @} 953 */ 954 955 #if defined(USE_FULL_LL_DRIVER) 956 /** @defgroup RTC_LL_EF_Init Initialization and de-initialization functions 957 * @{ 958 */ 959 960 ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx); 961 ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct); 962 void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct); 963 ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct); 964 void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct); 965 ErrorStatus LL_RTC_ALARM_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct); 966 void LL_RTC_ALARM_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct); 967 ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx); 968 ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx); 969 ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx); 970 ErrorStatus LL_RTC_TIME_SetCounter(RTC_TypeDef *RTCx, uint32_t TimeCounter); 971 ErrorStatus LL_RTC_ALARM_SetCounter(RTC_TypeDef *RTCx, uint32_t AlarmCounter); 972 973 /** 974 * @} 975 */ 976 #endif /* USE_FULL_LL_DRIVER */ 977 978 /** 979 * @} 980 */ 981 982 /** 983 * @} 984 */ 985 986 /** 987 * @} 988 */ 989 990 #endif /* defined(RTC) */ 991 992 /** 993 * @} 994 */ 995 996 #ifdef __cplusplus 997 } 998 #endif 999 1000 #endif /* __STM32F1xx_LL_RTC_H */