/*
 * Copyright (c) 2023 Juan Manuel Cruz <jcruz@fi.uba.ar> <jcruz@frba.utn.edu.ar>.
 *
 * See file `LICENSE` for full details
 */

#ifndef BOARD_INC_BOARD_H_
#define BOARD_INC_BOARD_H_

#ifdef __cplusplus
extern "C" {
#endif

#define NUCLEO_F103RC    (0)
#define NUCLEO_F303R8    (1)
#define NUCLEO_F401RE    (2)
#define NUCLEO_F446RE    (3)
#define NUCLEO_F413ZH    (4)
#define NUCLEO_F429ZI    (5)
#define NUCLEO_F439ZI    (6)
#define NUCLEO_F767ZI    (7)
#define STM32F407G_DISC1 (8)
#define STM32F429I_DISC1 (9)

#define BOARD (NUCLEO_F103RC)

/* STM32 Nucleo Boards - 32 Pins */
#if (BOARD == NUCLEO_F303R8)

#endif

/* STM32 Nucleo Boards - 64 Pins */
#if ((BOARD == NUCLEO_F103RC) || (BOARD == NUCLEO_F401RE) || (BOARD == NUCLEO_F446RE))

#define BTN_A_PIN     B1_Pin
#define BTN_A_PORT    B1_GPIO_Port
#define BTN_A_PRESSED GPIO_PIN_RESET
#define BTN_A_HOVER   GPIO_PIN_SET

#define LED_A_PIN     LD2_Pin
#define LED_A_PORT    LD2_GPIO_Port
#define LED_A_ON      GPIO_PIN_SET
#define LED_A_OFF     GPIO_PIN_RESET

#endif

/* STM32 Nucleo Boards - 144 Pins */
#if ((BOARD == NUCLEO_F413ZH) || (BOARD == NUCLEO_F429ZI) || (BOARD == NUCLEO_F439ZI) || (BOARD == NUCLEO_F767ZI))

#define BTN_A_PIN     USER_Btn_Pin
#define BTN_A_PORT    USER_Btn_GPIO_Port
#define BTN_A_PRESSED GPIO_PIN_SET
#define BTN_A_HOVER   GPIO_PIN_RESET

#define LED_A_PIN     LD1_Pin
#define LED_A_PORT    LD1_GPIO_Port
#define LED_A_ON      GPIO_PIN_SET
#define LED_A_OFF     GPIO_PIN_RESET

#endif

/* STM32 Discovery Kits */
#if ((BOARD == STM32F407G_DISC1) || (BOARD == STM32F429I_DISC1))

#define BTN_A_PIN     B1_Pin
#define BTN_A_PORT    B1_GPIO_Port
#define BTN_A_PRESSED GPIO_PIN_SET
#define BTN_A_HOVER   GPIO_PIN_RESET

#define LED_A_PIN     LD3_Pin
#define LED_A_PORT    LD3_GPIO_Port
#define LED_A_ON      GPIO_PIN_SET
#define LED_A_OFF     GPIO_PIN_RESET

#endif

#ifdef __cplusplus
}
#endif

#endif /* BOARD_INC_BOARD_H_ */