vhdl/dev/rtc/rtc_tb.vhd (528B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 use ieee.numeric_std.all; 4 5 entity rtc_tb is 6 end entity; 7 8 architecture rtc_arq of rtc_tb is 9 10 constant clk_freq : integer := 1e6; 11 12 signal sig_clk : std_logic := '0'; 13 signal sig_rst : std_logic := '0'; 14 signal sig_clk_ms : std_logic; 15 16 begin 17 18 rtc : entity work.rtc(rtc_arq) 19 generic map(clk_freq => clk_freq) 20 port map( 21 clk => sig_clk, 22 rst => sig_rst, 23 clk_ms => sig_clk_ms); 24 25 sig_clk <= not sig_clk after 1 us; 26 27 end architecture;
