vhdl/basics/loop/loop_tb.vhd (956B)
1 entity loop_tb is 2 end entity; 3 4 architecture loop_arq of loop_tb is 5 begin 6 process is 7 variable i : integer := 0; 8 begin 9 10 report "Hello."; 11 12 loop 13 report "This is a loop that only executes once."; 14 exit; 15 end loop; 16 17 loop 18 report "This is another loop which exits based on a condition."; 19 report "And this is iteration number " & integer'image(i); 20 21 i := i + 1; 22 23 if i > 2 then 24 exit; 25 end if; 26 end loop; 27 28 for i in 0 to 2 loop 29 report "This is a for loop which executes 3 times."; 30 report "And this is iteration number " & integer'image(i); 31 end loop; 32 33 i := 0; 34 while i < 5 loop 35 36 i := i + 1; 37 report "This is a while loop which executes 5 times."; 38 39 end loop; 40 41 report "Bye!"; 42 wait; 43 44 end process; 45 end architecture;