tps/1/src/tb/intersection_ctrl_tb.vhd (966B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 4 entity intersection_ctrl_tb is 5 end entity; 6 7 architecture intersection_ctrl_tb_arq of intersection_ctrl_tb is 8 9 constant MAX_CNT : integer := 10; 10 11 signal sig_clk : std_logic := '0'; 12 signal sig_rst : std_logic := '1'; 13 14 signal sig_red_1 : std_logic := '0'; 15 signal sig_yel_1 : std_logic := '0'; 16 signal sig_gre_1 : std_logic := '0'; 17 18 signal sig_red_2 : std_logic := '0'; 19 signal sig_yel_2 : std_logic := '0'; 20 signal sig_gre_2 : std_logic := '0'; 21 22 begin 23 24 intersection_ctrl : entity work.intersection_ctrl(intersection_ctrl_arq) 25 generic map(MAX_CNT => MAX_CNT) 26 port map( 27 clk => sig_clk, 28 rst => sig_rst, 29 30 red_1 => sig_red_1, 31 yel_1 => sig_yel_1, 32 gre_1 => sig_gre_1, 33 red_2 => sig_red_2, 34 yel_2 => sig_yel_2, 35 gre_2 => sig_gre_2); 36 37 sig_rst <= '0' after 2 ns; 38 sig_clk <= not sig_clk after 5 ns; 39 40 end architecture;