tps/1/src/rtl/rtc.vhd (966B)
1 library ieee; 2 use ieee.math_real.all; 3 4 use ieee.std_logic_1164.all; 5 use ieee.numeric_std.all; 6 7 8 entity rtc is 9 generic(MAX_CNT: integer := 50e6); 10 port( 11 clk : in std_logic; 12 rst : in std_logic; 13 14 seg_flag : out std_logic); 15 end; 16 17 architecture rtc_arq of rtc is 18 19 constant BITS : integer := integer(ceil(log2(real(MAX_CNT)))); 20 signal tick_cnt : unsigned(BITS-1 downto 0); 21 22 begin 23 24 process(clk, rst) 25 begin 26 27 if rst = '1' then 28 29 tick_cnt <= (others => '0'); 30 seg_flag <= '0'; 31 32 elsif rising_edge(clk) then 33 34 if tick_cnt = MAX_CNT - 1 then 35 tick_cnt <= (others => '0'); 36 else 37 tick_cnt <= tick_cnt + 1; 38 end if; 39 40 if tick_cnt = MAX_CNT - 2 then 41 seg_flag <= '1'; 42 else 43 seg_flag <= '0'; 44 end if; 45 46 end if; 47 48 end process; 49 50 end architecture;